Ken G. Pomaranski

Person

Roseville, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Computing with both lock-step and free-step processor modes
- Patent number 8,826,288
- Issue date Sep 2, 2014
- Hewlett-Packard Development Company, L.P.
- Andrew H. Barr
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
External state cache for computer processor
- Patent number 8,812,781
- Issue date Aug 19, 2014
- Hewlett-Packard Development Company, L.P.
- Ken G. Pomaranski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for CPU repair
- Patent number 8,667,324
- Issue date Mar 4, 2014
- Hewlett-Packard Development Company, L.P.
- Jeff Barlow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for CPU repair
- Patent number 8,661,289
- Issue date Feb 25, 2014
- Hewlett-Packard Development Company, L.P.
- Jeff Barlow
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for testing a memory
- Patent number 8,176,250
- Issue date May 8, 2012
- Hewlett-Packard Development Company, L.P.
- Dale J. Shidla
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods for CPU repair
- Patent number 7,917,804
- Issue date Mar 29, 2011
- Hewlett-Packard Development Company, L.P.
- Jeff Barlow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for testing a memory with an expansion card using...
- Patent number 7,797,134
- Issue date Sep 14, 2010
- Hewlett-Packard Development Company, L.P.
- Andrew H. Barr
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and systems for conducting processor health-checks
- Patent number 7,694,175
- Issue date Apr 6, 2010
- Hewlett-Packard Development Company, L.P.
- Jeff Barlow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for CPU repair
- Patent number 7,694,174
- Issue date Apr 6, 2010
- Hewlett-Packard Development Company, L.P.
- Jeff Barlow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for CPU repair
- Patent number 7,673,171
- Issue date Mar 2, 2010
- Hewlett-Packard Development Company, L.P.
- Jeff Barlow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High-availability cluster node removal and communication
- Patent number 7,664,994
- Issue date Feb 16, 2010
- Hewlett-Packard Development Company, L.P.
- Ken Gary Pomaranski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
CPU register diagnostic testing
- Patent number 7,613,961
- Issue date Nov 3, 2009
- Hewlett-Packard Development Company, L.P.
- Andrew Harvey Barr
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and systems for conducting processor health-checks
- Patent number 7,607,040
- Issue date Oct 20, 2009
- Hewlett-Packard Development Company, L.P.
- Jeff Barlow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for CPU repair
- Patent number 7,607,038
- Issue date Oct 20, 2009
- Hewlett-Packard Development Company, L.P.
- Jeff Barlow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for CPU repair
- Patent number 7,603,582
- Issue date Oct 13, 2009
- Hewlett-Packard Development Company, L.P.
- Jeff Barlow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for selecting a primary resource in a redundan...
- Patent number 7,596,726
- Issue date Sep 29, 2009
- Hewlett-Packard Development Company, L.P.
- Ken Gary Pomaranski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for automatically evaluating and allocating re...
- Patent number 7,586,946
- Issue date Sep 8, 2009
- Hewlett-Packard Development Company, L.P.
- Ken Gary Pomaranski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Compiler-scheduled CPU functional testing
- Patent number 7,581,210
- Issue date Aug 25, 2009
- Hewlett-Packard Development Company, L.P.
- Dale John Shidla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for CPU repair
- Patent number 7,533,293
- Issue date May 12, 2009
- Hewlett-Packard Development Company, L.P.
- Jeff Barlow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for CPU repair
- Patent number 7,523,346
- Issue date Apr 21, 2009
- Hewlett-Packard Development Company, L.P.
- Jeff Barlow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory error ranking
- Patent number 7,493,534
- Issue date Feb 17, 2009
- Hewlett-Packard Development Company, L.P.
- Ken Gary Pomaranski
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for testing a component in a computer system usin...
- Patent number 7,487,399
- Issue date Feb 3, 2009
- Hewlett-Packard Development Company, L.P.
- Ken G. Pomaranski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Selective memory allocation
- Patent number 7,484,065
- Issue date Jan 27, 2009
- Hewlett-Packard Development Company, L.P.
- Ken Gary Pomaranski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for controlling application of an error correctio...
- Patent number 7,437,651
- Issue date Oct 14, 2008
- Hewlett-Packard Development Company, L.P.
- John A. Nerl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Smart card for high-availability clustering
- Patent number 7,428,655
- Issue date Sep 23, 2008
- Hewlett-Packard Development Company, L.P.
- Ken Gary Pomaranski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
System and method for testing a cell
- Patent number 7,418,367
- Issue date Aug 26, 2008
- Hewlett-Packard Development Company, L.P.
- Ken G. Pomaranski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Runtime quality verification of execution units
- Patent number 7,415,700
- Issue date Aug 19, 2008
- Hewlett-Packard Development Company, L.P.
- Ken Gary Pomaranski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High-availability cluster with proactive maintenance
- Patent number 7,409,576
- Issue date Aug 5, 2008
- Hewlett-Packard Development Company, L.P.
- Ken Gary Pomaranski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for testing a memory using DMA
- Patent number 7,350,109
- Issue date Mar 25, 2008
- Hewlett-Packard Development Company, L.P.
- Andrew H. Barr
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory quality assurance
- Patent number 7,346,755
- Issue date Mar 18, 2008
- Hewlett-Packard Development, L.P.
- Ken Gary Pomaranski
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Systems and methods for CPU repair
- Publication number 20080005616
- Publication date Jan 3, 2008
- Jeff Barlow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for selecting a primary resource in a redundan...
- Publication number 20070101203
- Publication date May 3, 2007
- Ken Gary Pomaranski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for automatically evaluating and allocating re...
- Publication number 20070098014
- Publication date May 3, 2007
- Ken Gary Pomaranski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Hardware configurable CPU with high availability mode
- Publication number 20070088979
- Publication date Apr 19, 2007
- Ken Gary Pomaranski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Computing with both lock-step and free-step processor modes
- Publication number 20060245264
- Publication date Nov 2, 2006
- Andrew H. Barr
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Systems and methods for CPU repair
- Publication number 20060248312
- Publication date Nov 2, 2006
- Jeff Barlow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Systems and methods for CPU repair
- Publication number 20060248314
- Publication date Nov 2, 2006
- Jeff Barlow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Systems and methods for CPU repair
- Publication number 20060248392
- Publication date Nov 2, 2006
- Jeff Barlow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Systems and methods for CPU repair
- Publication number 20060248313
- Publication date Nov 2, 2006
- Jeff Barlow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Redundant I/O interface management
- Publication number 20060233204
- Publication date Oct 19, 2006
- Ken G. Pomaranski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
External state cache for computer processor
- Publication number 20060236034
- Publication date Oct 19, 2006
- Ken G. Pomaranski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Systems and methods for CPU repair
- Publication number 20060236035
- Publication date Oct 19, 2006
- Jeff Barlow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods and systems for conducting processor health-checks
- Publication number 20060230308
- Publication date Oct 12, 2006
- Jeff Barlow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Systems and methods for CPU repair
- Publication number 20060230230
- Publication date Oct 12, 2006
- Jeff Barlow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Systems and methods for CPU repair
- Publication number 20060230254
- Publication date Oct 12, 2006
- Jeff Barlow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Systems and methods for CPU repair
- Publication number 20060230255
- Publication date Oct 12, 2006
- Jeff Barlow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Systems and methods for CPU repair
- Publication number 20060230231
- Publication date Oct 12, 2006
- Jeff Barlow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods and systems for conducting processor health-checks
- Publication number 20060230307
- Publication date Oct 12, 2006
- Jeff Barlow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Smart card for high-availability clustering
- Publication number 20060053330
- Publication date Mar 9, 2006
- Ken Gary Pomaranski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
High-availability cluster node removal and communication
- Publication number 20060053336
- Publication date Mar 9, 2006
- Ken Gary Pomaranski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
High-availability cluster with proactive maintenance
- Publication number 20060053337
- Publication date Mar 9, 2006
- Ken Gary Pomaranski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for controlling application of an error correctio...
- Publication number 20050289440
- Publication date Dec 29, 2005
- John A. Nerl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for controlling application of an error correctio...
- Publication number 20050289439
- Publication date Dec 29, 2005
- John A. Nerl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for applying error correction code (ECC) erasure...
- Publication number 20050289402
- Publication date Dec 29, 2005
- John A. Nerl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Selective memory allocation
- Publication number 20050235124
- Publication date Oct 20, 2005
- Ken Gary Pomaranski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NODE MANAGEMENT IN HIGH-AVAILABILITY CLUSTER
- Publication number 20050188283
- Publication date Aug 25, 2005
- Ken Gary Pomaranski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Multi-state status reporting for high-availability cluster nodes
- Publication number 20050188265
- Publication date Aug 25, 2005
- Ken Gary Pomaranski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Cluster node status detection and communication
- Publication number 20050177779
- Publication date Aug 11, 2005
- Ken Gary Pomaranski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
System and method for testing an interconnect in a computer system
- Publication number 20050125187
- Publication date Jun 9, 2005
- Ken G. Pomaranski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and method for detecting and rejecting high impedance fai...
- Publication number 20050116733
- Publication date Jun 2, 2005
- Andrew H. Barr
- G01 - MEASURING TESTING

Ken G. Pomaranski

Person

Patents Grantslast 30 patents

Computing with both lock-step and free-step processor modes

External state cache for computer processor

Systems and methods for CPU repair

Systems and methods for CPU repair

System and method for testing a memory

Systems and methods for CPU repair

System and method for testing a memory with an expansion card using...

Methods and systems for conducting processor health-checks

Systems and methods for CPU repair

Systems and methods for CPU repair

High-availability cluster node removal and communication

CPU register diagnostic testing

Methods and systems for conducting processor health-checks

Systems and methods for CPU repair

Systems and methods for CPU repair

Method and apparatus for selecting a primary resource in a redundan...

Method and apparatus for automatically evaluating and allocating re...

Compiler-scheduled CPU functional testing

Systems and methods for CPU repair

Systems and methods for CPU repair

Memory error ranking

System and method for testing a component in a computer system usin...

Selective memory allocation

System and method for controlling application of an error correctio...

Smart card for high-availability clustering

System and method for testing a cell

Runtime quality verification of execution units

High-availability cluster with proactive maintenance

System and method for testing a memory using DMA

Memory quality assurance

Patents Applicationslast 30 patents

Systems and methods for CPU repair

Method and apparatus for selecting a primary resource in a redundan...

Method and apparatus for automatically evaluating and allocating re...

Hardware configurable CPU with high availability mode

Computing with both lock-step and free-step processor modes

Systems and methods for CPU repair

Systems and methods for CPU repair

Systems and methods for CPU repair

Systems and methods for CPU repair

Redundant I/O interface management

External state cache for computer processor

Systems and methods for CPU repair

Methods and systems for conducting processor health-checks

Systems and methods for CPU repair

Systems and methods for CPU repair

Systems and methods for CPU repair

Systems and methods for CPU repair

Methods and systems for conducting processor health-checks

Smart card for high-availability clustering

High-availability cluster node removal and communication

High-availability cluster with proactive maintenance

System and method for controlling application of an error correctio...

System and method for controlling application of an error correctio...

System and method for applying error correction code (ECC) erasure...

Selective memory allocation

NODE MANAGEMENT IN HIGH-AVAILABILITY CLUSTER

Multi-state status reporting for high-availability cluster nodes

Cluster node status detection and communication

System and method for testing an interconnect in a computer system

Apparatus and method for detecting and rejecting high impedance fai...