Kenneth R. Burch

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Margin tool for double data rate memory systems
- Patent number 9,437,326
- Issue date Sep 6, 2016
- FREESCALE SEMICONDUCTOR, INC.
- Mazyar Razzaz
- G11 - INFORMATION STORAGE
Information Patent Grant
Multistage voltage regulator circuit
- Patent number 9,117,507
- Issue date Aug 25, 2015
- FREESCALE SEMICONDUCTOR, INC.
- Ravindraraj Ramaraju
- G05 - CONTROLLING REGULATING
Information Patent Grant
High precision single edge capture and delay measurement circuit
- Patent number 8,736,338
- Issue date May 27, 2014
- FREESCALE SEMICONDUCTOR, INC.
- Lipeng Cao
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory voltage regulator with leakage current voltage control
- Patent number 8,537,625
- Issue date Sep 17, 2013
- FREESCALE SEMICONDUCTOR, INC.
- Ravindraraj Ramaraju
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of forming a semiconductor package including two devices
- Patent number 8,415,203
- Issue date Apr 9, 2013
- FREESCALE SEMICONDUCTOR, INC.
- Kenneth R. Burch
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Integrated circuit having low power mode voltage regulator
- Patent number 8,319,548
- Issue date Nov 27, 2012
- FREESCALE SEMICONDUCTOR, INC.
- Ravindraraj Ramaraju
- G05 - CONTROLLING REGULATING
Information Patent Grant
Apparatus and method to compensate for injection locking
- Patent number 8,291,257
- Issue date Oct 16, 2012
- FREESCALE SEMICONDUCTOR, INC.
- Samuel G. Stephens
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Device that can be rendered useless and method thereof
- Patent number 8,254,161
- Issue date Aug 28, 2012
- FREESCALE SEMICONDUCTOR, INC.
- Kenneth R. Burch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of making an integrated circuit package with shielding via r...
- Patent number 8,097,494
- Issue date Jan 17, 2012
- FREESCALE SEMICONDUCTOR, INC.
- Jinbang Tang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Circuit for a low power mode
- Patent number 7,825,720
- Issue date Nov 2, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Ravindraraj Ramaraju
- G05 - CONTROLLING REGULATING
Information Patent Grant
Method of packaging a device having a multi-contact elastomer conne...
- Patent number 7,807,511
- Issue date Oct 5, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Marc A. Mangrum
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Test interposer having active circuit component and method therefor
- Patent number 7,808,258
- Issue date Oct 5, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Marc A Mangrum
- G01 - MEASURING TESTING
Information Patent Grant
Method of packaging a device having a tangible element and device t...
- Patent number 7,696,016
- Issue date Apr 13, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Marc A. Mangrum
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of packaging a semiconductor device and a prefabricated conn...
- Patent number 7,655,502
- Issue date Feb 2, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Marc A. Mangrum
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electromagnetic shield formation for integrated circuit die package
- Patent number 7,651,889
- Issue date Jan 26, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Jinbang Tang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of packaging a semiconductor device and a prefabricated conn...
- Patent number 7,588,951
- Issue date Sep 15, 2009
- FREESCALE SEMICONDUCTOR, INC.
- Marc A. Mangrum
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of packaging a device using a dielectric layer
- Patent number 7,476,563
- Issue date Jan 13, 2009
- FREESCALE SEMICONDUCTOR, INC.
- Marc A. Mangrum
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Asynchronous debug interface
- Patent number 7,089,467
- Issue date Aug 8, 2006
- FREESCALE SEMICONDUCTOR, INC.
- Kenneth R. Burch
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Integrated circuit testing with a visual indicator
- Patent number 6,717,430
- Issue date Apr 6, 2004
- Motorola, Inc.
- Kenneth R. Burch
- G01 - MEASURING TESTING
Information Patent Grant
LCD driver module and method thereof
- Patent number 6,137,466
- Issue date Oct 24, 2000
- Motorola, Inc.
- Claude Moughanni
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Grant
Low power schmitt trigger
- Patent number 5,886,556
- Issue date Mar 23, 1999
- Motorola, Inc.
- Jeffrey Dale Ganger
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
System and method for executing a low power delay instruction
- Patent number 5,584,031
- Issue date Dec 10, 1996
- Motorola Inc.
- Kenneth R. Burch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus for transitioning between power supply levels
- Patent number 5,394,028
- Issue date Feb 28, 1995
- Motorola, Inc.
- James R. Feddeler
- G05 - CONTROLLING REGULATING
Information Patent Grant
Emulation system and method for development of a low power data pro...
- Patent number 5,383,137
- Issue date Jan 17, 1995
- Motorola, Inc.
- Kenneth R. Burch
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for switching between gain curves of a voltage...
- Patent number 5,272,453
- Issue date Dec 21, 1993
- Motorola Inc.
- Kevin M. Traynor
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Low power crystal oscillator with automatic gain control
- Patent number 5,113,156
- Issue date May 12, 1992
- Motorola, Inc.
- John K. Mahabadi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Electronic timer apparatus
- Patent number 5,111,487
- Issue date May 5, 1992
- Motorola, Inc.
- Kenneth R. Burch
- G04 - HOROLOGY
Information Patent Grant
Multiple bandwidth crystal controlled oscillator
- Patent number 4,896,122
- Issue date Jan 23, 1990
- Motorola, Inc.
- Omid Tahernia
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Timer architecture for multi-task computers and for serial data dec...
- Patent number 4,879,733
- Issue date Nov 7, 1989
- Motorola, Inc.
- Kenneth R. Burch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Paging receiver having selectively protected regions of memory
- Patent number 4,839,628
- Issue date Jun 13, 1989
- Motorola, Inc.
- Walter L. Davis
- G08 - SIGNALLING

Patents Applicationslast 30 patents

Information Patent Application
MARGIN TOOL FOR DOUBLE DATA RATE MEMORY SYSTEMS
- Publication number 20150364212
- Publication date Dec 17, 2015
- FREESCALE SEMICONDUCTOR, INC.
- MAZYAR RAZZAZ
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
High Precision Single Edge Capture and Delay Measurement Circuit
- Publication number 20130271196
- Publication date Oct 17, 2013
- Lipeng Cao
- G01 - MEASURING TESTING
Information Patent Application
MEMORY VOLTAGE REGULATOR WITH LEAKAGE CURRENT VOLTAGE CONTROL
- Publication number 20120230126
- Publication date Sep 13, 2012
- Ravindraraj Ramaraju
- G11 - INFORMATION STORAGE
Information Patent Application
MULTISTAGE VOLTAGE REGULATOR CIRCUIT
- Publication number 20120032655
- Publication date Feb 9, 2012
- Ravindraraj Ramaraju
- G05 - CONTROLLING REGULATING
Information Patent Application
APPARATUS AND METHOD TO COMPENSATE FOR INJECTION LOCKING
- Publication number 20110234277
- Publication date Sep 29, 2011
- Samuel G. Stephens
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ELECTROMAGNETIC SHIELD FORMATION FOR INTEGRATED CIRCUIT DIE PACKAGE
- Publication number 20110003435
- Publication date Jan 6, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Jinbang Tang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT HAVING LOW POWER MODE VOLTAGE RETULATOR
- Publication number 20100207688
- Publication date Aug 19, 2010
- RAVINDRARAJ RAMARAJU
- G05 - CONTROLLING REGULATING
Information Patent Application
CIRCUIT FOR A LOW POWER MODE
- Publication number 20100207687
- Publication date Aug 19, 2010
- Ravindraraj Ramaraju
- G05 - CONTROLLING REGULATING
Information Patent Application
PACKAGING HAVING TWO DEVICES AND METHOD OF FORMING THEREOF
- Publication number 20100078808
- Publication date Apr 1, 2010
- KENNETH R. BURCH
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
DEVICE THAT CAN BE RENDERED USELESS AND METHOD THEREOF
- Publication number 20100050275
- Publication date Feb 25, 2010
- Kenneth R. Burch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TEST INTERPOSER HAVING ACTIVE CIRCUIT COMPONENT AND METHOD THEREFOR
- Publication number 20090322364
- Publication date Dec 31, 2009
- FREESCALE SEMICONDUCTOR, INC.
- Marc A. Mangrum
- G01 - MEASURING TESTING
Information Patent Application
METHOD OF PACKAGING A SEMICONDUCTOR DEVICE AND A PREFABRICATED CONN...
- Publication number 20090286390
- Publication date Nov 19, 2009
- FREESCALE SEMICONDUCTOR, INC.
- Marc A. Mangrum
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SCHMITT TRIGGER HAVING VARIABLE HYSTERESIS AND METHOD THEREFOR
- Publication number 20090237135
- Publication date Sep 24, 2009
- Ravindraraj Ramaraju
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ELECTROMAGNETIC SHIELD FORMATION FOR INTEGRATED CIRCUIT DIE PACKAGE
- Publication number 20090075428
- Publication date Mar 19, 2009
- FREESCALE SEMICONDUCTOR, INC.
- Jinbang Tang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF PACKAGING A DEVICE HAVING A KEYPAD SWITCH POINT
- Publication number 20080119004
- Publication date May 22, 2008
- Kenneth R. Burch
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF PACKAGING A DEVICE HAVING A TANGIBLE ELEMENT AND DEVICE T...
- Publication number 20080116560
- Publication date May 22, 2008
- Marc A. Mangrum
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF PACKAGING A DEVICE HAVING A MULTI-CONTACT ELASTOMER CONNE...
- Publication number 20080116573
- Publication date May 22, 2008
- Marc A. Mangrum
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF PACKAGING A SEMICONDUCTOR DEVICE AND A PREFABRICATED CONN...
- Publication number 20080119015
- Publication date May 22, 2008
- Marc A. Mangrum
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF PACKAGING A DEVICE USING A DIELECTRIC LAYER
- Publication number 20080119013
- Publication date May 22, 2008
- Marc A. Mangrum
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Variable switching point circuit
- Publication number 20080054943
- Publication date Mar 6, 2008
- Ravindraraj Ramaraju
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Asynchronous debug interface
- Publication number 20040039963
- Publication date Feb 26, 2004
- Kenneth R. Burch
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Integrated circuit testing with a visual indicator
- Publication number 20030153105
- Publication date Aug 14, 2003
- Kenneth R. Burch
- G01 - MEASURING TESTING

Kenneth R. Burch

Person

Patents Grantslast 30 patents

Margin tool for double data rate memory systems

Multistage voltage regulator circuit

High precision single edge capture and delay measurement circuit

Memory voltage regulator with leakage current voltage control

Method of forming a semiconductor package including two devices

Integrated circuit having low power mode voltage regulator

Apparatus and method to compensate for injection locking

Device that can be rendered useless and method thereof

Method of making an integrated circuit package with shielding via r...

Circuit for a low power mode

Method of packaging a device having a multi-contact elastomer conne...

Test interposer having active circuit component and method therefor

Method of packaging a device having a tangible element and device t...

Method of packaging a semiconductor device and a prefabricated conn...

Electromagnetic shield formation for integrated circuit die package

Method of packaging a semiconductor device and a prefabricated conn...

Method of packaging a device using a dielectric layer

Asynchronous debug interface

Integrated circuit testing with a visual indicator

LCD driver module and method thereof

Low power schmitt trigger

System and method for executing a low power delay instruction

Apparatus for transitioning between power supply levels

Emulation system and method for development of a low power data pro...

Method and apparatus for switching between gain curves of a voltage...

Low power crystal oscillator with automatic gain control

Electronic timer apparatus

Multiple bandwidth crystal controlled oscillator

Timer architecture for multi-task computers and for serial data dec...

Paging receiver having selectively protected regions of memory

Patents Applicationslast 30 patents

MARGIN TOOL FOR DOUBLE DATA RATE MEMORY SYSTEMS

High Precision Single Edge Capture and Delay Measurement Circuit

MEMORY VOLTAGE REGULATOR WITH LEAKAGE CURRENT VOLTAGE CONTROL

MULTISTAGE VOLTAGE REGULATOR CIRCUIT

APPARATUS AND METHOD TO COMPENSATE FOR INJECTION LOCKING

ELECTROMAGNETIC SHIELD FORMATION FOR INTEGRATED CIRCUIT DIE PACKAGE

INTEGRATED CIRCUIT HAVING LOW POWER MODE VOLTAGE RETULATOR

CIRCUIT FOR A LOW POWER MODE

PACKAGING HAVING TWO DEVICES AND METHOD OF FORMING THEREOF

DEVICE THAT CAN BE RENDERED USELESS AND METHOD THEREOF

TEST INTERPOSER HAVING ACTIVE CIRCUIT COMPONENT AND METHOD THEREFOR

METHOD OF PACKAGING A SEMICONDUCTOR DEVICE AND A PREFABRICATED CONN...

SCHMITT TRIGGER HAVING VARIABLE HYSTERESIS AND METHOD THEREFOR

ELECTROMAGNETIC SHIELD FORMATION FOR INTEGRATED CIRCUIT DIE PACKAGE

METHOD OF PACKAGING A DEVICE HAVING A KEYPAD SWITCH POINT

METHOD OF PACKAGING A DEVICE HAVING A TANGIBLE ELEMENT AND DEVICE T...

METHOD OF PACKAGING A DEVICE HAVING A MULTI-CONTACT ELASTOMER CONNE...

METHOD OF PACKAGING A SEMICONDUCTOR DEVICE AND A PREFABRICATED CONN...

METHOD OF PACKAGING A DEVICE USING A DIELECTRIC LAYER

Variable switching point circuit

Asynchronous debug interface

Integrated circuit testing with a visual indicator