Ketan H. Zaveri

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Techniques for providing clock signals in an integrated circuit
- Patent number 9,024,673
- Issue date May 5, 2015
- Altera Corporation
- Ramanand Venkata
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and methods for adjusting performance of programmable log...
- Patent number 8,198,914
- Issue date Jun 12, 2012
- Altera Corporation
- Andy L. Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Redundancy structures and methods in a programmable logic device
- Patent number 8,191,025
- Issue date May 29, 2012
- Altera Corporation
- Michael Chan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus and methods for adjusting performance of programmable log...
- Patent number 7,936,184
- Issue date May 3, 2011
- Altera Corporation
- Andy L. Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Redundancy structures and methods in a programmable logic device
- Patent number 7,644,386
- Issue date Jan 5, 2010
- Altera Corporation
- Michael Chan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and system for reducing static leakage current in programmab...
- Patent number 7,295,036
- Issue date Nov 13, 2007
- Altera Corporation
- Ketan H. Zaveri
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Redundancy structures and methods in a programmable logic device
- Patent number 7,180,324
- Issue date Feb 20, 2007
- Altera Corporation
- Michael Chan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable logic device with redundant circuitry
- Patent number 6,965,249
- Issue date Nov 15, 2005
- Altera Corporation
- Christopher Lane
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable logic device with circuitry for observing programmable...
- Patent number 6,897,678
- Issue date May 24, 2005
- Altera Corporation
- Ketan Zaveri
- G01 - MEASURING TESTING
Information Patent Grant
Programmable logic device with hierarchical interconnection resources
- Patent number 6,798,242
- Issue date Sep 28, 2004
- Altera Corporation
- Srinivas T. Reddy
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable logic device with hierarchical interconnection resources
- Patent number 6,577,160
- Issue date Jun 10, 2003
- Altera Corporation
- Srinivas T. Reddy
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable logic device with circuitry for observing programmable...
- Patent number 6,481,000
- Issue date Nov 12, 2002
- Altera Corporation
- Ketan Zaveri
- G01 - MEASURING TESTING
Information Patent Grant
Configurable memory structures in a programmable logic device
- Patent number 6,462,577
- Issue date Oct 8, 2002
- Altera Corporation
- Andy L. Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable logic device with hierarchical interconnection resources
- Patent number 6,417,694
- Issue date Jul 9, 2002
- Altera Corporation
- Srinivas T. Reddy
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Multifunction memory array in a programmable logic device
- Patent number 6,356,110
- Issue date Mar 12, 2002
- Altera Corporation San Jose CA
- Srinivas T. Reddy
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Circuitry and methods for internal interconnection of programmable...
- Patent number 6,335,634
- Issue date Jan 1, 2002
- Srinivas T. Reddy
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable logic device circuitry for improving multiplier speed...
- Patent number 6,323,677
- Issue date Nov 27, 2001
- Altera Corporation
- Christopher F. Lane
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable logic device with hierarchical interconnection resources
- Patent number 6,300,794
- Issue date Oct 9, 2001
- Altera Corporation
- Srinivas T. Reddy
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable logic array integrated circuit with distributed random...
- Patent number 6,249,143
- Issue date Jun 19, 2001
- Altera Corporation
- Ketan Zaveri
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable logic device with circuitry for observing programmable...
- Patent number 6,157,210
- Issue date Dec 5, 2000
- Altera Corporation
- Ketan Zaveri
- G01 - MEASURING TESTING
Information Patent Grant
Circuitry and methods for internal interconnection of programmable...
- Patent number 6,107,824
- Issue date Aug 22, 2000
- Altera Corporation
- Srinivas T. Reddy
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable logic device circuitry for improving multiplier speed...
- Patent number 6,069,487
- Issue date May 30, 2000
- Altera Corporation
- Christopher F. Lane
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable logic device with hierarchical interconnection resources
- Patent number 5,977,793
- Issue date Nov 2, 1999
- Altera Corporation
- Srinivas T. Reddy
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
Apparatus and methods for adjusting performance of programmable log...
- Publication number 20110204919
- Publication date Aug 25, 2011
- Altera Corporation
- Andy L. Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Apparatus and methods for adjusting performance of programmable log...
- Publication number 20070200596
- Publication date Aug 30, 2007
- Andy L. Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Redundancy structures and methods in a programmable logic device
- Publication number 20050264318
- Publication date Dec 1, 2005
- Altera Corporation
- Michael Chan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Programmable logic device with hierarchical interconnection resources
- Publication number 20030201794
- Publication date Oct 30, 2003
- Altera Corporation
- Srinivas T. Reddy
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Programmable logic device with hierarchical interconnection resources
- Publication number 20030076130
- Publication date Apr 24, 2003
- Srinivas T. Reddy
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Programmable logic device with redundant circuitry
- Publication number 20030072185
- Publication date Apr 17, 2003
- Christopher Lane
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Programmable logic device with circuitry for observing programmable...
- Publication number 20030033584
- Publication date Feb 13, 2003
- Altera Corporation
- Ketan Zaveri
- G01 - MEASURING TESTING
Information Patent Application
Programmable logic device with hierarchical interconnection resources
- Publication number 20020041191
- Publication date Apr 11, 2002
- Altera Corporation
- Srinivas T. Reddy
- H03 - BASIC ELECTRONIC CIRCUITRY

Ketan H. Zaveri

Person

Patents Grantslast 30 patents

Techniques for providing clock signals in an integrated circuit

Apparatus and methods for adjusting performance of programmable log...

Redundancy structures and methods in a programmable logic device

Apparatus and methods for adjusting performance of programmable log...

Redundancy structures and methods in a programmable logic device

Method and system for reducing static leakage current in programmab...

Redundancy structures and methods in a programmable logic device

Programmable logic device with redundant circuitry

Programmable logic device with circuitry for observing programmable...

Programmable logic device with hierarchical interconnection resources

Programmable logic device with hierarchical interconnection resources

Programmable logic device with circuitry for observing programmable...

Configurable memory structures in a programmable logic device

Programmable logic device with hierarchical interconnection resources

Multifunction memory array in a programmable logic device

Circuitry and methods for internal interconnection of programmable...

Programmable logic device circuitry for improving multiplier speed...

Programmable logic device with hierarchical interconnection resources

Programmable logic array integrated circuit with distributed random...

Programmable logic device with circuitry for observing programmable...

Circuitry and methods for internal interconnection of programmable...

Programmable logic device circuitry for improving multiplier speed...

Programmable logic device with hierarchical interconnection resources

Patents Applicationslast 30 patents

Apparatus and methods for adjusting performance of programmable log...

Apparatus and methods for adjusting performance of programmable log...

Redundancy structures and methods in a programmable logic device

Programmable logic device with hierarchical interconnection resources

Programmable logic device with hierarchical interconnection resources

Programmable logic device with redundant circuitry

Programmable logic device with circuitry for observing programmable...

Programmable logic device with hierarchical interconnection resources