Kevin J. Gearhardt

Person

Fort Collins, CO, US

People

Patents Grantslast 30 patents

Information Patent Grant
High-speed TDF testing on low cost testers using on-chip pulse gene...
- Patent number 7,375,570
- Issue date May 20, 2008
- LSI Logic Corporation
- Kevin Gearhardt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Built-in self test circuitry for process monitor circuit for rapidc...
- Patent number 7,272,763
- Issue date Sep 18, 2007
- LSI Corporation
- Kevin Gearhardt
- G01 - MEASURING TESTING
Information Patent Grant
Scan test expansion module
- Patent number 7,240,264
- Issue date Jul 3, 2007
- LSI Corporation
- Kevin J. Gearhardt
- G11 - INFORMATION STORAGE
Information Patent Grant
Testing with high speed pulse generator
- Patent number 7,216,279
- Issue date May 8, 2007
- LSI Logic Corporation
- Kevin J. Gearhardt
- G01 - MEASURING TESTING
Information Patent Grant
Methods and structure for improved high-speed TDF testing using on-...
- Patent number 7,202,656
- Issue date Apr 10, 2007
- LSI Logic Corporation
- Kevin Gearhardt
- G01 - MEASURING TESTING
Information Patent Grant
Four point measurement technique for programmable impedance drivers...
- Patent number 7,152,012
- Issue date Dec 19, 2006
- LSI Logic Corporation
- Kevin Gearhardt
- G01 - MEASURING TESTING
Information Patent Grant
Technique for measurement of programmable termination resistor netw...
- Patent number 7,106,074
- Issue date Sep 12, 2006
- LSI Logic Corporation
- Kevin Gearhardt
- G01 - MEASURING TESTING
Information Patent Grant
Analog to digital converter built in self test
- Patent number 7,081,841
- Issue date Jul 25, 2006
- LSI Logic Corporation
- Douglas J. Feist
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Built-in self test technique for programmable impedance drivers for...
- Patent number 7,042,242
- Issue date May 9, 2006
- LSI Logic Corporation
- Kevin Gearhardt
- G01 - MEASURING TESTING
Information Patent Grant
Metastability risk simulation analysis tool and method
- Patent number 6,408,265
- Issue date Jun 18, 2002
- LSI Logic Corporation
- Richard T. Schultz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit design using a frequency synthesizer that automa...
- Patent number 6,216,254
- Issue date Apr 10, 2001
- LSI Logic Corporation
- Michael S. Pesce
- G01 - MEASURING TESTING
Information Patent Grant
Automated test equipment digital tester expansion apparatus
- Patent number 5,701,309
- Issue date Dec 23, 1997
- AT&T Global Information Solutions Company
- Kevin J. Gearhardt
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
Testing with high speed pulse generator
- Publication number 20070018669
- Publication date Jan 25, 2007
- Kevin J. Gearhardt
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
High-speed TDF testing on low cost testers using on-chip pulse gene...
- Publication number 20060284665
- Publication date Dec 21, 2006
- LSI Logic Corporation
- Kevin Gearhardt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Scan test expansion module
- Publication number 20060248418
- Publication date Nov 2, 2006
- Kevin J. Gearhardt
- G01 - MEASURING TESTING
Information Patent Application
High speed on chip testing
- Publication number 20060085706
- Publication date Apr 20, 2006
- Kevin J. Gearhardt
- G01 - MEASURING TESTING
Information Patent Application
Four point measurement technique for programmable impedance drivers...
- Publication number 20060074580
- Publication date Apr 6, 2006
- Kevin Gearhardt
- G01 - MEASURING TESTING
Information Patent Application
Built-in self test circuitry for process monitor circuit for rapidc...
- Publication number 20060069968
- Publication date Mar 30, 2006
- Kevin Gearhardt
- G01 - MEASURING TESTING
Information Patent Application
Technique for high-speed TDF testing on low cost testers using on-c...
- Publication number 20060068054
- Publication date Mar 30, 2006
- Kevin Gearhardt
- G01 - MEASURING TESTING
Information Patent Application
Technique for measurement of programmable termination resistor netw...
- Publication number 20060066320
- Publication date Mar 30, 2006
- Kevin Gearhardt
- G01 - MEASURING TESTING
Information Patent Application
Built-in self test technique for programmable impedance drivers for...
- Publication number 20050264314
- Publication date Dec 1, 2005
- Kevin Gearhardt
- G01 - MEASURING TESTING

Kevin J. Gearhardt

Person

Patents Grantslast 30 patents

High-speed TDF testing on low cost testers using on-chip pulse gene...

Built-in self test circuitry for process monitor circuit for rapidc...

Scan test expansion module

Testing with high speed pulse generator

Methods and structure for improved high-speed TDF testing using on-...

Four point measurement technique for programmable impedance drivers...

Technique for measurement of programmable termination resistor netw...

Analog to digital converter built in self test

Built-in self test technique for programmable impedance drivers for...

Metastability risk simulation analysis tool and method

Integrated circuit design using a frequency synthesizer that automa...

Automated test equipment digital tester expansion apparatus

Patents Applicationslast 30 patents

Testing with high speed pulse generator

High-speed TDF testing on low cost testers using on-chip pulse gene...

Scan test expansion module

High speed on chip testing

Four point measurement technique for programmable impedance drivers...

Built-in self test circuitry for process monitor circuit for rapidc...

Technique for high-speed TDF testing on low cost testers using on-c...

Technique for measurement of programmable termination resistor netw...

Built-in self test technique for programmable impedance drivers for...