Kevin K. DEZFULIAN

Person

Mount Kisco, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Inductors with airgap electrical isolation
- Patent number 12,211,886
- Issue date Jan 28, 2025
- GLOBALFOUNDRIES U.S. Inc.
- Prateek Kumar Sharma
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Slotted shields for use with an electro-optical phase shifter
- Patent number 11,934,051
- Issue date Mar 19, 2024
- GLOBALFOUNDRIES U.S. INC.
- Kevin K. Dezfulian
- G02 - OPTICS
Information Patent Grant
Photonics chips with reticle stitching by back-to-back tapered sect...
- Patent number 11,880,066
- Issue date Jan 23, 2024
- GLOBALFOUNDRIES U.S. Inc.
- Kevin Dezfulian
- G02 - OPTICS
Information Patent Grant
Slotted shields for use with an electro-optical phase shifter
- Patent number 11,644,696
- Issue date May 9, 2023
- GLOBALFOUNDRIES U.S. INC.
- Kevin K. Dezfulian
- G02 - OPTICS
Information Patent Grant
Optical power modulators with unloaded transmission lines
- Patent number 11,630,335
- Issue date Apr 18, 2023
- GLOBALFOUNDRIES U.S. INC.
- Michal Rakowski
- G02 - OPTICS
Information Patent Grant
Hybrid edge couplers with layers in multiple levels
- Patent number 11,531,164
- Issue date Dec 20, 2022
- GLOBALFOUNDRIES U.S. INC.
- Kevin K. Dezfulian
- G02 - OPTICS
Information Patent Grant
Photonics integrated circuit with silicon nitride waveguide edge co...
- Patent number 11,487,059
- Issue date Nov 1, 2022
- GLOBALFOUNDRIES U.S. INC.
- Asli Sahin
- G02 - OPTICS
Information Patent Grant
Edge couplers with stacked layering
- Patent number 11,215,756
- Issue date Jan 4, 2022
- GLOBALFOUNDRIES U.S. INC.
- Yusheng Bian
- G02 - OPTICS
Information Patent Grant
Grating-based filters for photonics applications
- Patent number 10,969,544
- Issue date Apr 6, 2021
- GLOBALFOUNDRIES U.S. INC.
- Shuren Hu
- G02 - OPTICS
Information Patent Grant
Selective voltage binning leakage screen
- Patent number 9,772,374
- Issue date Sep 26, 2017
- International Business Machines Corporation
- Jeanne P. Bickford
- G01 - MEASURING TESTING
Information Patent Grant
Multiple manufacturing line qualification
- Patent number 9,536,796
- Issue date Jan 3, 2017
- Globalfoundries Inc.
- Jeanne P. Bickford
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Systems and methods for semiconductor line scribe line centering
- Patent number 9,514,999
- Issue date Dec 6, 2016
- GLOBALFOUNDRIES Inc.
- Jeanne P. Bickford
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Opto-thermal annealing methods for forming metal gate and fully sil...
- Patent number 8,039,331
- Issue date Oct 18, 2011
- International Business Machines Corporation
- Scott D. Allen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and structure to form self-aligned selective-SOI
- Patent number 7,482,656
- Issue date Jan 27, 2009
- International Business Machines Corporation
- Zhijiong Luo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating a transistor structure
- Patent number 7,413,961
- Issue date Aug 19, 2008
- Chartered Semiconductor Manufacturing Ltd.
- Yung Fu Chong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Opto-thermal annealing methods for forming metal gate and fully sil...
- Patent number 7,410,852
- Issue date Aug 12, 2008
- International Business Machines Corporation
- Scott D. Allen
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
STRUCTURES FOR A PHOTONICS CHIP THAT ENABLE EXTERNAL COMMUNICATION
- Publication number 20250164707
- Publication date May 22, 2025
- GLOBALFOUNDRIES U.S. Inc.
- Arpan Dasgupta
- G02 - OPTICS
Information Patent Application
PHOTODETECTORS WITH A NOTCHED LIGHT-ABSORBING LAYER
- Publication number 20250147235
- Publication date May 8, 2025
- GLOBALFOUNDRIES U.S. Inc.
- Yusheng Bian
- G02 - OPTICS
Information Patent Application
PHOTONIC STRUCTURES INCLUDING MULTIPLE INPUT/OUTPUT OPTICAL COUPLERS
- Publication number 20250085491
- Publication date Mar 13, 2025
- GLOBALFOUNDRIES U.S. Inc.
- Yusheng Bian
- G02 - OPTICS
Information Patent Application
CALIBRATION MARKERS FOR A PHOTONICS CHIP
- Publication number 20240427094
- Publication date Dec 26, 2024
- GLOBALFOUNDRIES U.S. Inc.
- Keith Donegan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REFERENCE MARKERS ADJACENT TO A CAVITY IN A PHOTONICS CHIP
- Publication number 20240361529
- Publication date Oct 31, 2024
- GLOBALFOUNDRIES U.S. Inc.
- Keith Donegan
- G02 - OPTICS
Information Patent Application
WAVEGUIDE ESCALATORS FOR A PHOTONICS CHIP
- Publication number 20240288631
- Publication date Aug 29, 2024
- GLOBALFOUNDRIES U.S. Inc.
- Yusheng Bian
- G02 - OPTICS
Information Patent Application
PHOTONICS CHIPS WITH RETICLE STITCHING BY BACK-TO-BACK TAPERED SECT...
- Publication number 20230417990
- Publication date Dec 28, 2023
- GLOBALFOUNDRIES U.S. Inc.
- Kevin Dezfulian
- G02 - OPTICS
Information Patent Application
SLOTTED SHIELDS FOR USE WITH AN ELECTRO-OPTICAL PHASE SHIFTER
- Publication number 20220317482
- Publication date Oct 6, 2022
- GLOBALFOUNDRIES U.S. Inc.
- Kevin K. Dezfulian
- G02 - OPTICS
Information Patent Application
PHOTONICS INTEGRATED CIRCUIT WITH SILICON NITRIDE WAVEGUIDE EDGE CO...
- Publication number 20220268994
- Publication date Aug 25, 2022
- GLOBALFOUNDRIES U.S. Inc.
- Asli Sahin
- G02 - OPTICS
Information Patent Application
HYBRID EDGE COUPLERS WITH LAYERS IN MULTIPLE LEVELS
- Publication number 20220252790
- Publication date Aug 11, 2022
- GLOBALFOUNDRIES U.S. Inc.
- Kevin K. Dezfulian
- G02 - OPTICS
Information Patent Application
OPTICAL POWER MODULATORS WITH UNLOADED TRANSMISSION LINES
- Publication number 20220252910
- Publication date Aug 11, 2022
- GLOBALFOUNDRIES U.S. Inc.
- Michal Rakowski
- G02 - OPTICS
Information Patent Application
EDGE COUPLERS WITH STACKED LAYERING
- Publication number 20210333474
- Publication date Oct 28, 2021
- GLOBALFOUNDRIES U.S. Inc.
- Yusheng Bian
- G02 - OPTICS
Information Patent Application
SYSTEMS AND METHODS FOR SEMICONDUCTOR LINE SCRIBE CENTERING
- Publication number 20140188265
- Publication date Jul 3, 2014
- International Business Machines Corporation
- Jeanne P. BICKFORD
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTIPLE MANUFACTURING LINE QUALIFICATION
- Publication number 20140188266
- Publication date Jul 3, 2014
- International Business Machines Corporation
- Jeanne P. BICKFORD
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELECTIVE VOLTAGE BINNING LEAKAGE SCREEN
- Publication number 20140100799
- Publication date Apr 10, 2014
- International Business Machines Corporation
- Jeanne P. BICKFORD
- G01 - MEASURING TESTING
Information Patent Application
SEMICONDUCTOR STRUCTURE
- Publication number 20140021616
- Publication date Jan 23, 2014
- International Business Machines Corporation
- Diego Anzola
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR STRUCTURE
- Publication number 20140024146
- Publication date Jan 23, 2014
- International Business Machines Corporation
- Diego Anzola
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR CREATING WAFER TEST PATTERN
- Publication number 20090291510
- Publication date Nov 26, 2009
- International Business Machines Corporation
- Steven C. Catlett
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
OPTO-THERMAL ANNEALING METHODS FOR FORMING METAL GATE AND FULLY SIL...
- Publication number 20080220581
- Publication date Sep 11, 2008
- International Business Machines Corporation
- Scott D. Allen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD AND STRUCTURE TO FORM SELF-ALIGNED SELECTIVE-SOI
- Publication number 20070278591
- Publication date Dec 6, 2007
- International Business Machines Corporation
- Zhijiong Luo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FABRICATING A TRANSISTOR STRUCTURE
- Publication number 20070269952
- Publication date Nov 22, 2007
- Chartered Semiconductor Manufacturing LTD.
- Yung Fu Chong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Opto-thermal annealing methods for forming metal gate and fully sil...
- Publication number 20070249131
- Publication date Oct 25, 2007
- International Business Machines Corporation
- Scott D. Allen
- H01 - BASIC ELECTRIC ELEMENTS

Kevin K. DEZFULIAN

Person

Patents Grantslast 30 patents

Inductors with airgap electrical isolation

Slotted shields for use with an electro-optical phase shifter

Photonics chips with reticle stitching by back-to-back tapered sect...

Slotted shields for use with an electro-optical phase shifter

Optical power modulators with unloaded transmission lines

Hybrid edge couplers with layers in multiple levels

Photonics integrated circuit with silicon nitride waveguide edge co...

Edge couplers with stacked layering

Grating-based filters for photonics applications

Selective voltage binning leakage screen

Multiple manufacturing line qualification

Systems and methods for semiconductor line scribe line centering

Opto-thermal annealing methods for forming metal gate and fully sil...

Method and structure to form self-aligned selective-SOI

Method of fabricating a transistor structure

Opto-thermal annealing methods for forming metal gate and fully sil...

Patents Applicationslast 30 patents

STRUCTURES FOR A PHOTONICS CHIP THAT ENABLE EXTERNAL COMMUNICATION

PHOTODETECTORS WITH A NOTCHED LIGHT-ABSORBING LAYER

PHOTONIC STRUCTURES INCLUDING MULTIPLE INPUT/OUTPUT OPTICAL COUPLERS

CALIBRATION MARKERS FOR A PHOTONICS CHIP

REFERENCE MARKERS ADJACENT TO A CAVITY IN A PHOTONICS CHIP

WAVEGUIDE ESCALATORS FOR A PHOTONICS CHIP

PHOTONICS CHIPS WITH RETICLE STITCHING BY BACK-TO-BACK TAPERED SECT...

SLOTTED SHIELDS FOR USE WITH AN ELECTRO-OPTICAL PHASE SHIFTER

PHOTONICS INTEGRATED CIRCUIT WITH SILICON NITRIDE WAVEGUIDE EDGE CO...

HYBRID EDGE COUPLERS WITH LAYERS IN MULTIPLE LEVELS

OPTICAL POWER MODULATORS WITH UNLOADED TRANSMISSION LINES

EDGE COUPLERS WITH STACKED LAYERING

SYSTEMS AND METHODS FOR SEMICONDUCTOR LINE SCRIBE CENTERING

MULTIPLE MANUFACTURING LINE QUALIFICATION

SELECTIVE VOLTAGE BINNING LEAKAGE SCREEN

SEMICONDUCTOR STRUCTURE

SEMICONDUCTOR STRUCTURE

METHOD FOR CREATING WAFER TEST PATTERN

OPTO-THERMAL ANNEALING METHODS FOR FORMING METAL GATE AND FULLY SIL...

METHOD AND STRUCTURE TO FORM SELF-ALIGNED SELECTIVE-SOI

METHOD OF FABRICATING A TRANSISTOR STRUCTURE

Opto-thermal annealing methods for forming metal gate and fully sil...