Kevin R. Iadonato

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
System and method for assigning tags to control instruction process...
- Patent number 8,074,052
- Issue date Dec 6, 2011
- Seiko Epson Corporation
- Kevin R. Iadonato
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for register renaming
- Patent number 7,979,678
- Issue date Jul 12, 2011
- Seiko Epson Corporation
- Trevor A. Deosaran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Superscalar RISC instruction scheduling
- Patent number 7,802,074
- Issue date Sep 21, 2010
- Sanjiv Garg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for register renaming
- Patent number 7,558,945
- Issue date Jul 7, 2009
- Seiko Epson Corporation
- Trevor A. Deosaran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated structure layout and layout of interconnections for an i...
- Patent number 7,555,738
- Issue date Jun 30, 2009
- Seiko Epson Corporation
- Kevin Ray Iadonato
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for assigning tags to control instruction process...
- Patent number 7,430,651
- Issue date Sep 30, 2008
- Seiko Epson Corporation
- Kevin R. Iadonato
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated structure layout and layout of interconnections for an i...
- Patent number 7,174,525
- Issue date Feb 6, 2007
- Seiko Epson Corporation
- Kevin Ray Iadonato
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Floating point unit pipeline synchronized with processor pipeline
- Patent number 7,162,616
- Issue date Jan 9, 2007
- Renesas Technology America, Inc
- Prasenjit Biswas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Superscalar RISC instruction scheduling
- Patent number 7,051,187
- Issue date May 23, 2006
- Transmeta Corporation
- Sanjiv Garg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for assigning tags to control instruction process...
- Patent number 7,043,624
- Issue date May 9, 2006
- Seiko Epson Corporation
- Kevin R. Iadonato
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for register renaming
- Patent number 6,970,995
- Issue date Nov 29, 2005
- Seiko Epson Corporation
- Trevor A. Deosaran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for register renaming
- Patent number 6,922,772
- Issue date Jul 26, 2005
- Seiko Epson Corporation
- Trevor A. Deosaran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated structure layout and layout of interconnections for an i...
- Patent number 6,782,521
- Issue date Aug 24, 2004
- Seiko Epson Corporation
- Kevin R. Iadonato
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Floating point unit pipeline synchronized with processor pipeline
- Patent number 6,772,327
- Issue date Aug 3, 2004
- Hitachi Micro Systems, Inc.
- Prasenjit Biswas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for assigning tags to control instruction process...
- Patent number 6,757,808
- Issue date Jun 29, 2004
- Seiko Epson Corporation
- Kevin R. Iadonato
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Floating point unit pipeline synchronized with processor pipeline
- Patent number 6,418,528
- Issue date Jul 9, 2002
- Hitachi America, Ltd.
- Prasenjit Biswas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for register renaming
- Patent number 6,408,375
- Issue date Jun 18, 2002
- Seiko Epson Corporation
- Trevor A. Deosaran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated structure layout and layout of interconnections for an i...
- Patent number 6,401,232
- Issue date Jun 4, 2002
- Seiko Epson Corporation
- Kevin R. Iadonato
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for assigning tags to control instruction process...
- Patent number 6,360,309
- Issue date Mar 19, 2002
- Seiko Epson Corporation
- Kevin R. Iadonato
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Superscalar RISC instruction scheduling
- Patent number 6,289,433
- Issue date Sep 11, 2001
- Transmeta Corporation
- Sanjiv Garg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for register renaming
- Patent number 6,272,617
- Issue date Aug 7, 2001
- Seiko Epson Corporation
- Trevor A. Deosaran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for register renaming
- Patent number 6,138,231
- Issue date Oct 24, 2000
- Seiko Epson Corporation
- Trevor A. Deosaran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for assigning tags to control instruction process...
- Patent number 6,092,176
- Issue date Jul 18, 2000
- Seiko Epson Corporation
- Kevin R. Iadonato
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated structure layout and layout of interconnections for an i...
- Patent number 6,083,274
- Issue date Jul 4, 2000
- Seiko Epson Corporation
- Kevin R. Iadonato
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Superscalar RISC instruction scheduling
- Patent number 5,974,526
- Issue date Oct 26, 1999
- Seiko Corporation
- Sanjiv Garg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for assigning tags to control instruction process...
- Patent number 5,896,542
- Issue date Apr 20, 1999
- Seiko Epson Corporation
- Kevin R. Iadonato
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for assigning tags to instructions to control ins...
- Patent number 5,892,963
- Issue date Apr 6, 1999
- Seiko Epson Corporation
- Kevin Ray Iadonato
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Floating point unit pipeline synchronized with processor pipeline
- Patent number 5,860,000
- Issue date Jan 12, 1999
- Hitachi Micro Systems, Inc.
- Prasenjit Biswas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated structure layout and layout of interconnections for an i...
- Patent number 5,831,871
- Issue date Nov 3, 1998
- Seiko Epson Corporation
- Kevin R. Iadonato
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for register renaming
- Patent number 5,809,276
- Issue date Sep 15, 1998
- Seiko Epson Corporation
- Trevor A. Deosaran
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
System and Method for Register Renaming
- Publication number 20090235053
- Publication date Sep 17, 2009
- SEIKO EPSON CORPORATION
- Trevor A. Deosaran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and Method for Assigning Tags to Control Instruction Process...
- Publication number 20090013158
- Publication date Jan 8, 2009
- SEIKO EPSON CORPORATION
- Kevin R. Iadonato
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Superscalar RISC instruction scheduling
- Publication number 20080059770
- Publication date Mar 6, 2008
- Transmeta Corporation
- Sanjiv Garg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Integrated structure layout and layout of interconnections for an i...
- Publication number 20070113214
- Publication date May 17, 2007
- Seiko Epson Corporation
- Kevin R. Iadonato
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for assigning tags to control instruction process...
- Publication number 20060123218
- Publication date Jun 8, 2006
- SEIKO EPSON CORPORATION
- Kevin R. Iadonato
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Superscalar RISC instruction scheduling
- Publication number 20060041736
- Publication date Feb 23, 2006
- Transmeta Corporation
- Sanjiv Garg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for register renaming
- Publication number 20060020773
- Publication date Jan 26, 2006
- SEIKO EPSON CORPORATION
- Trevor A. Deosaran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Integrated structure layout and layout of interconnections for an i...
- Publication number 20040243961
- Publication date Dec 2, 2004
- SEIKO EPSON CORPORATION
- Kevin Ray Iadonato
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for assigning tags to control instruction process...
- Publication number 20040199746
- Publication date Oct 7, 2004
- SEIKO EPSON CORPORATION
- Kevin R. Iadonato
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Floating point unit pipeline synchronized with processor pipeline
- Publication number 20040172522
- Publication date Sep 2, 2004
- Prasenjit Biswas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Superscalar RISC instruction scheduling
- Publication number 20030005260
- Publication date Jan 2, 2003
- Sanjiv Garg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for register renaming
- Publication number 20020194456
- Publication date Dec 19, 2002
- Trevor A. Deosaran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Floating point unit pipeline synchronized with processor pipeline
- Publication number 20020174323
- Publication date Nov 21, 2002
- Prasenjit Biswas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Integrated structure layout and layout of interconnections for an i...
- Publication number 20020129324
- Publication date Sep 12, 2002
- Kevin R. Iadonato
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for register renaming
- Publication number 20020083300
- Publication date Jun 27, 2002
- Trevor A. Deosaran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for assigning tags to control instruction process...
- Publication number 20020053014
- Publication date May 2, 2002
- Kevin R. Iadonato
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for register renaming
- Publication number 20010011343
- Publication date Aug 2, 2001
- Trevor A. Deosaran
- G06 - COMPUTING CALCULATING COUNTING

Kevin R. Iadonato

Person

Patents Grantslast 30 patents

System and method for assigning tags to control instruction process...

System and method for register renaming

Superscalar RISC instruction scheduling

System and method for register renaming

Integrated structure layout and layout of interconnections for an i...

System and method for assigning tags to control instruction process...

Integrated structure layout and layout of interconnections for an i...

Floating point unit pipeline synchronized with processor pipeline

Superscalar RISC instruction scheduling

System and method for assigning tags to control instruction process...

System and method for register renaming

System and method for register renaming

Integrated structure layout and layout of interconnections for an i...

Floating point unit pipeline synchronized with processor pipeline

System and method for assigning tags to control instruction process...

Floating point unit pipeline synchronized with processor pipeline

System and method for register renaming

Integrated structure layout and layout of interconnections for an i...

System and method for assigning tags to control instruction process...

Superscalar RISC instruction scheduling

System and method for register renaming

System and method for register renaming

System and method for assigning tags to control instruction process...

Integrated structure layout and layout of interconnections for an i...

Superscalar RISC instruction scheduling

System and method for assigning tags to control instruction process...

System and method for assigning tags to instructions to control ins...

Floating point unit pipeline synchronized with processor pipeline

Integrated structure layout and layout of interconnections for an i...

System and method for register renaming

Patents Applicationslast 30 patents

System and Method for Register Renaming

System and Method for Assigning Tags to Control Instruction Process...

Superscalar RISC instruction scheduling

Integrated structure layout and layout of interconnections for an i...

System and method for assigning tags to control instruction process...

Superscalar RISC instruction scheduling

System and method for register renaming

Integrated structure layout and layout of interconnections for an i...

System and method for assigning tags to control instruction process...

Floating point unit pipeline synchronized with processor pipeline

Superscalar RISC instruction scheduling

System and method for register renaming

Floating point unit pipeline synchronized with processor pipeline

Integrated structure layout and layout of interconnections for an i...

System and method for register renaming

System and method for assigning tags to control instruction process...

System and method for register renaming