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Khushrav S. Chhor
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Fremont, CA, US
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Patents Grants
last 30 patents
Information
Patent Grant
Methods of making and using memory card with enhanced testability
Patent number
7,806,324
Issue date
Oct 5, 2010
SanDisk 3D, LLC
Khushrav S. Chhor
G11 - INFORMATION STORAGE
Information
Patent Grant
Memory module having interconnected and stacked integrated circuits
Patent number
7,432,599
Issue date
Oct 7, 2008
Sandisk 3D LLC
Vani Verma
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Memory card with enhanced testability and methods of making and usi...
Patent number
7,352,199
Issue date
Apr 1, 2008
SanDisk Corporation
Khushrav S. Chhor
G11 - INFORMATION STORAGE
Information
Patent Grant
Memory module having interconnected and stacked integrated circuits
Patent number
7,005,730
Issue date
Feb 28, 2006
Matrix Semiconductor, Inc.
Vani Verma
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Molded memory module and method of making the module absent a subst...
Patent number
6,843,421
Issue date
Jan 18, 2005
Matrix Semiconductor, Inc.
Khushrav S. Chhor
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Memory module having interconnected and stacked integrated circuits
Patent number
6,731,011
Issue date
May 4, 2004
Matrix Semiconductor, Inc.
Vani Verma
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Architecture, circuitry and method for configuring volatile and/or...
Patent number
6,215,689
Issue date
Apr 10, 2001
Cypress Semiconductor Corporation
Khushrav S. Chhor
G11 - INFORMATION STORAGE
Information
Patent Grant
Circuitry, apparatus and method for embedding a test status outcome...
Patent number
6,209,110
Issue date
Mar 27, 2001
Cypress Semiconductor Corporation
Khushrav S. Chhor
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Circuitry, apparatus and method for embedding quantifiable test res...
Patent number
6,181,615
Issue date
Jan 30, 2001
Cypress Semiconductor Corporation
Khushrav S. Chhor
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Apparatus, method and kit for adjusting integrated circuit lead def...
Patent number
6,160,410
Issue date
Dec 12, 2000
Cypress Semiconductor Corporation
William R. Orso
G01 - MEASURING TESTING
Information
Patent Grant
Apparatus, method and kit for aligning an integrated circuit to a t...
Patent number
6,057,696
Issue date
May 2, 2000
Cypress Semiconductor Corp.
William R. Orso
G01 - MEASURING TESTING
Patents Applications
last 30 patents
Information
Patent Application
Memory module having interconnected and stacked integrated circuits
Publication number
20060118927
Publication date
Jun 8, 2006
MATRIX SEMICONDUCTOR, INC.
Vani Verma
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
Memory module having interconnected and stacked integrated circuits
Publication number
20040169285
Publication date
Sep 2, 2004
Vani Verma
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
Memory module having interconnected and stacked integrated circuits
Publication number
20030155659
Publication date
Aug 21, 2003
Vani Verma
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
Molded memory module and method of making the module absent a subst...
Publication number
20030029920
Publication date
Feb 13, 2003
Khushrav S. Chhor
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
Memory card with enhanced testability and methods of making and usi...
Publication number
20020116668
Publication date
Aug 22, 2002
MATRIX SEMICONDUCTOR, INC.
Khushrav S. Chhor
H01 - BASIC ELECTRIC ELEMENTS