Kian Chai Lee

Person

Sinagpore, SG

People

Patents Grantslast 30 patents

Information Patent Grant
Balanced semiconductor device packages including lead frame with fl...
- Patent number 8,084,846
- Issue date Dec 27, 2011
- Micron Technology, Inc.
- Teck Kheng Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus for flip-chip packaging providing testing capability
- Patent number 7,915,718
- Issue date Mar 29, 2011
- Micron Technology, Inc.
- Teck Kheng Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for designing carrier substrates with raised terminals
- Patent number 7,368,391
- Issue date May 6, 2008
- Micron Technology, Inc.
- Cher Khng Victor Tan
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Double bumping of flexible substrate for first and second level int...
- Patent number 7,320,933
- Issue date Jan 22, 2008
- Micron Technology, Inc.
- Teck Kheng Lee
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
BOC BGA package for die with I-shaped bond pad layout
- Patent number 7,112,048
- Issue date Sep 26, 2006
- Micron Technology, Inc.
- Thiam Chye Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Solder masks including dams for at least partially surrounding term...
- Patent number 7,061,124
- Issue date Jun 13, 2006
- Micron Technology, Inc.
- Cher Khng Victor Tan
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Solder masks for use on carrier substrates, carrier substrates and...
- Patent number 7,018,871
- Issue date Mar 28, 2006
- Micron Technology, Inc.
- Cher Khng Victor Tan
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method for package reduction in stacked chip and board assemblies
- Patent number 7,005,316
- Issue date Feb 28, 2006
- Micron Technology, Inc.
- Teck Kheng Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Solder masks for use on carrier substrates, carrier substrates and...
- Patent number 6,787,923
- Issue date Sep 7, 2004
- Micron Technology, Inc.
- Cher Khng Victor Tan
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Apparatus for package reduction in stacked chip and board assemblies
- Patent number 6,787,917
- Issue date Sep 7, 2004
- Micron Technology, Inc.
- Teck Kheng Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
BOC BGA package for die with I-shaped bond pad layout
- Patent number 6,720,666
- Issue date Apr 13, 2004
- Micron Technology, Inc.
- Thiam Chye Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
BOC BGA package for die with I-shaped bond pad layout
- Patent number 6,692,987
- Issue date Feb 17, 2004
- Micron Technology, Inc.
- Thiam Chye Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for distributing mold material in a mold for p...
- Patent number 6,656,769
- Issue date Dec 2, 2003
- Micron Technology, Inc.
- Kian Chai Lee
- B29 - WORKING OF PLASTICS WORKING OF SUBSTANCES IN A PLASTIC STATE, IN GENERAL
Information Patent Grant
Method for fabricating BOC semiconductor package
- Patent number 6,638,792
- Issue date Oct 28, 2003
- Micron Technology, Inc.
- Chong Chin Hui
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus for package reduction in stacked chip and board assemblies
- Patent number 6,583,502
- Issue date Jun 24, 2003
- Micron Technology, Inc.
- Teck Kheng Lee
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Balanced semiconductor device packages including lead frame with fl...
- Publication number 20080122072
- Publication date May 29, 2008
- Teck Kheng Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and apparatus for flip-chip packaging providing testing capa...
- Publication number 20060240595
- Publication date Oct 26, 2006
- Teck Kheng Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods for designing carrier substrates with raised terminals
- Publication number 20050287702
- Publication date Dec 29, 2005
- Cher Khng Victor Tan
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
Solder masks including dams for at least partially surrounding term...
- Publication number 20050029676
- Publication date Feb 10, 2005
- Cher Khng Victor Tan
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Double bumping of flexible substrate for first and second level int...
- Publication number 20040198033
- Publication date Oct 7, 2004
- Teck Kheng Lee
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Solder masks for use on carrier substrates, carrier substrates and...
- Publication number 20040077109
- Publication date Apr 22, 2004
- Cher Khng Victor Tan
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Double bumping of flexible substrate for first and second level int...
- Publication number 20040036170
- Publication date Feb 26, 2004
- Teck Kheng Lee
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
BOC BGA package for die with I-shaped bond pad layout
- Publication number 20030211659
- Publication date Nov 13, 2003
- Micron Technology, Inc.
- Thiam Chye Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BOC BGA package for die with I-shaped bond pad layout
- Publication number 20030211660
- Publication date Nov 13, 2003
- Micron Technology, Inc.
- Thiam Chye Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Solder masks for use on carrier substrates, carrier substrates and...
- Publication number 20030193092
- Publication date Oct 16, 2003
- Cher Khng Victor Tan
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Apparatus for package reduction in stacked chip and board assemblies
- Publication number 20030164550
- Publication date Sep 4, 2003
- Teck Kheng Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and apparatus for flip-chip packaging providing testing capa...
- Publication number 20030164551
- Publication date Sep 4, 2003
- Teck Kheng Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BOC BGA package for die with I-shaped bond pad layout
- Publication number 20030148557
- Publication date Aug 7, 2003
- Thiam Chye Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and apparatus for package reduction in stacked chip and boar...
- Publication number 20030102546
- Publication date Jun 5, 2003
- Teck Kheng Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and apparatus for package reduction in stacked chip and boar...
- Publication number 20020149097
- Publication date Oct 17, 2002
- Teck Kheng Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and apparatus for distributing mold material in a mold for p...
- Publication number 20020072153
- Publication date Jun 13, 2002
- Kian Chai Lee
- B29 - WORKING OF PLASTICS WORKING OF SUBSTANCES IN A PLASTIC STATE, IN GENERAL

Kian Chai Lee

Person

Patents Grantslast 30 patents

Balanced semiconductor device packages including lead frame with fl...

Apparatus for flip-chip packaging providing testing capability

Methods for designing carrier substrates with raised terminals

Double bumping of flexible substrate for first and second level int...

BOC BGA package for die with I-shaped bond pad layout

Solder masks including dams for at least partially surrounding term...

Solder masks for use on carrier substrates, carrier substrates and...

Method for package reduction in stacked chip and board assemblies

Solder masks for use on carrier substrates, carrier substrates and...

Apparatus for package reduction in stacked chip and board assemblies

BOC BGA package for die with I-shaped bond pad layout

BOC BGA package for die with I-shaped bond pad layout

Method and apparatus for distributing mold material in a mold for p...

Method for fabricating BOC semiconductor package

Apparatus for package reduction in stacked chip and board assemblies

Patents Applicationslast 30 patents

Balanced semiconductor device packages including lead frame with fl...

Method and apparatus for flip-chip packaging providing testing capa...

Methods for designing carrier substrates with raised terminals

Solder masks including dams for at least partially surrounding term...

Double bumping of flexible substrate for first and second level int...

Solder masks for use on carrier substrates, carrier substrates and...

Double bumping of flexible substrate for first and second level int...

BOC BGA package for die with I-shaped bond pad layout

BOC BGA package for die with I-shaped bond pad layout

Solder masks for use on carrier substrates, carrier substrates and...

Apparatus for package reduction in stacked chip and board assemblies

Method and apparatus for flip-chip packaging providing testing capa...

BOC BGA package for die with I-shaped bond pad layout

Method and apparatus for package reduction in stacked chip and boar...

Method and apparatus for package reduction in stacked chip and boar...

Method and apparatus for distributing mold material in a mold for p...