Kin-Leong Pey

Person

Singapore, SG

People

Patents Grantslast 30 patents

Information Patent Grant
Control gate dummy for word line uniformity and method for producin...
- Patent number 10,381,360
- Issue date Aug 13, 2019
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Laiqiang Luo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Slot designs in wide metal lines
- Patent number 9,318,378
- Issue date Apr 19, 2016
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Yeow Kheng Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
RRAM cell with bottom electrode(s) positioned in a semiconductor su...
- Patent number 9,024,286
- Issue date May 5, 2015
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Wenhu Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low OHMIC contacts
- Patent number 8,922,003
- Issue date Dec 30, 2014
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Dexter Xueming Tan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating nano devices
- Patent number 8,338,280
- Issue date Dec 25, 2012
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Dexter Tan
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Integrated circuit structure with electrical strap and its method o...
- Patent number 8,188,550
- Issue date May 29, 2012
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Lieyong Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating semiconductor devices with shallow diffusion...
- Patent number 8,101,487
- Issue date Jan 24, 2012
- Nanyang Technological University
- Dexter Xueming Tan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Formation of strained Si channel and Si1-xGex source/drain structur...
- Patent number 7,892,905
- Issue date Feb 22, 2011
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Kuang Kian Ong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming a shallow junction region using defect engineeri...
- Patent number 7,888,224
- Issue date Feb 15, 2011
- Nanyang Technological University
- Kuang Kian Ong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit system using dual damascene process
- Patent number 7,253,097
- Issue date Aug 7, 2007
- Chartered Semiconductor Manufacturing, Ltd.
- Yeow Kheng Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for performing nickel salicidation
- Patent number 7,030,451
- Issue date Apr 18, 2006
- Chartered Semiconductor Manufacturing Ltd.
- Pooi See Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual metal gate process: metals and their silicides
- Patent number 7,005,716
- Issue date Feb 28, 2006
- Chartered Semiconductor Manufacturing Ltd.
- Wenhe Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods to form dual metal gates by incorporating metals and their...
- Patent number 6,891,233
- Issue date May 10, 2005
- Chartered Semiconductor Manufacturing Ltd.
- Wenhe Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for performing nickel salicidation
- Patent number 6,890,854
- Issue date May 10, 2005
- Chartered Semiconductor Manufacturing, Inc.
- Pooi See Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods to form dual metal gates by incorporating metals and their...
- Patent number 6,835,989
- Issue date Dec 28, 2004
- Chartered Semiconductor Manufacturing Ltd.
- Wenhe Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual metal gate process: metals and their silicides
- Patent number 6,750,519
- Issue date Jun 15, 2004
- Chartered Semiconductor Manufacturing Ltd.
- Wenhe Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods to form dual metal gates by incorporating metals and their...
- Patent number 6,677,652
- Issue date Jan 13, 2004
- Chartered Semiconductor Manufacturing Ltd.
- Wenhe Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Formation of silicided shallow junctions using implant through meta...
- Patent number 6,624,489
- Issue date Sep 23, 2003
- Chartered Semiconductor Manufacturing Ltd.
- Yung Fu Chong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Incorporation of dielectric layer onto SThM tips for direct thermal...
- Patent number 6,566,650
- Issue date May 20, 2003
- Chartered Semiconductor Manufacturing Ltd.
- Chang Chaun Hu
- G01 - MEASURING TESTING
Information Patent Grant
Salicide method for producing a semiconductor device using silicon/...
- Patent number 6,534,390
- Issue date Mar 18, 2003
- Chartered Semiconductor Manufacturing Ltd.
- Yung Fu Chong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to reduce variation in LDD series resistance
- Patent number 6,534,388
- Issue date Mar 18, 2003
- Chartered Semiconductor Manufacturing Ltd.
- Wenhe Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming dual thickness gate dielectric structures via use...
- Patent number 6,524,910
- Issue date Feb 25, 2003
- Chartered Semiconductor Manufacturing Ltd.
- Wenhe Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual metal gate process: metals and their silicides
- Patent number 6,475,908
- Issue date Nov 5, 2002
- Chartered Semiconductor Manufacturing Ltd.
- Wenhe Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods to form dual metal gates by incorporating metals and their...
- Patent number 6,458,695
- Issue date Oct 1, 2002
- Chartered Semiconductor Manufacturing Ltd.
- Wenhe Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating void-free epitaxial-CoSi2 with ultra-shallow...
- Patent number 6,410,429
- Issue date Jun 25, 2002
- Chartered Semiconductor Manufacturing Inc.
- Chaw Sing Ho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Activating source and drain junctions and extensions using a single...
- Patent number 6,391,731
- Issue date May 21, 2002
- Chartered Semiconductor Manufacturing Ltd.
- Yung Fu Chong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to reduce polysilicon depletion in MOS transistors
- Patent number 6,387,784
- Issue date May 14, 2002
- Chartered Semiconductor Manufacturing Ltd.
- Yung Fu Chong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Formation of silicided ultra-shallow junctions using implant throug...
- Patent number 6,365,446
- Issue date Apr 2, 2002
- Chartered Semiconductor Manufacturing Ltd.
- Yung Fu Chong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for effective nickel silicide formation
- Patent number 6,339,021
- Issue date Jan 15, 2002
- Chartered Semiconductor Manufacturing Ltd.
- Wee Leng Tan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to form MOS transistors with shallow junctions using laser a...
- Patent number 6,335,253
- Issue date Jan 1, 2002
- Chartered Semiconductor Manufacturing Ltd.
- Yung Fu Chong
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
SLOT DESIGNS IN WIDE METAL LINES
- Publication number 20160233157
- Publication date Aug 11, 2016
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Yeow Kheng LIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RRAM CELL WITH BOTTOM ELECTRODE(S) POSITIONED IN A SEMICONDUCTOR SU...
- Publication number 20140077148
- Publication date Mar 20, 2014
- Nanyang Technological University
- Wenhu Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOW OHMIC CONTACTS
- Publication number 20130187264
- Publication date Jul 25, 2013
- Nanyang Technological University
- Dexter Xueming TAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Fabrication of RRAM Cell Using CMOS Compatible Processes
- Publication number 20120241710
- Publication date Sep 27, 2012
- Nanyang Technological University
- Wenhu Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FABRICATING NANO DEVICES
- Publication number 20120009749
- Publication date Jan 12, 2012
- Nanyang Technological University
- Dexter TAN
- B82 - NANO-TECHNOLOGY
Information Patent Application
METHOD FOR FORMING A SHALLOW JUNCTION REGION USING DEFECT ENGINEERI...
- Publication number 20100124809
- Publication date May 20, 2010
- Kuang Kian Ong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FABRICATING SEMICONDUCTOR DEVICES WITH SHALLOW DIFFUSION...
- Publication number 20090286373
- Publication date Nov 19, 2009
- CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
- Dexter Xueming TAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT STRUCTURE WITH ELECTRICAL STRAP
- Publication number 20090166758
- Publication date Jul 2, 2009
- CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
- Lieyong YANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Formation of strained Si channel and Si1-xGex source/drain structur...
- Publication number 20070032026
- Publication date Feb 8, 2007
- Chartered Semiconductor Manufacturing Ltd.
- Kuang Kian Ong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT SYSTEM USING DUAL DAMASCENE PROCESS
- Publication number 20070001303
- Publication date Jan 4, 2007
- CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
- Yeow Kheng Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Slot designs in wide metal lines
- Publication number 20060040491
- Publication date Feb 23, 2006
- Yeow Kheng Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and apparatus for performing nickel salicidation
- Publication number 20050156269
- Publication date Jul 21, 2005
- Pooi See Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Dual metal gate process: metals and their silicides
- Publication number 20040217429
- Publication date Nov 4, 2004
- Chartered Semiconductor Manufacturing Ltd.
- Wenhe Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods to form dual metal gates by incorporating metals and their...
- Publication number 20040132239
- Publication date Jul 8, 2004
- Chartered Semiconductor Manufacturing Ltd.
- Wenhe Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods to form dual metal gates by incorporating metals and their...
- Publication number 20040132296
- Publication date Jul 8, 2004
- Chartered Semiconductor Manufacturing Ltd.
- Wenhe Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Dual metal gate process: metals and their silicides
- Publication number 20040065930
- Publication date Apr 8, 2004
- CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
- Wenhe Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods to form dual metal gates by incorporating metals and their...
- Publication number 20030075766
- Publication date Apr 24, 2003
- Chartered Semiconductor Manufacturing Ltd.
- Wenhe Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Formation of silicided shallow junctions using implant through meta...
- Publication number 20020098689
- Publication date Jul 25, 2002
- Chartered Semiconductor Manufacturing Ltd.
- Yung Fu Chong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and apparatus for performing nickel salicidation
- Publication number 20020064918
- Publication date May 30, 2002
- Pooi See Lee
- H01 - BASIC ELECTRIC ELEMENTS

Kin-Leong Pey

Person

Patents Grantslast 30 patents

Control gate dummy for word line uniformity and method for producin...

Slot designs in wide metal lines

RRAM cell with bottom electrode(s) positioned in a semiconductor su...

Low OHMIC contacts

Method for fabricating nano devices

Integrated circuit structure with electrical strap and its method o...

Method for fabricating semiconductor devices with shallow diffusion...

Formation of strained Si channel and Si1-xGex source/drain structur...

Method for forming a shallow junction region using defect engineeri...

Integrated circuit system using dual damascene process

Method and apparatus for performing nickel salicidation

Dual metal gate process: metals and their silicides

Methods to form dual metal gates by incorporating metals and their...

Method and apparatus for performing nickel salicidation

Methods to form dual metal gates by incorporating metals and their...

Dual metal gate process: metals and their silicides

Methods to form dual metal gates by incorporating metals and their...

Formation of silicided shallow junctions using implant through meta...

Incorporation of dielectric layer onto SThM tips for direct thermal...

Salicide method for producing a semiconductor device using silicon/...

Method to reduce variation in LDD series resistance

Method of forming dual thickness gate dielectric structures via use...

Dual metal gate process: metals and their silicides

Methods to form dual metal gates by incorporating metals and their...

Method for fabricating void-free epitaxial-CoSi2 with ultra-shallow...

Activating source and drain junctions and extensions using a single...

Method to reduce polysilicon depletion in MOS transistors

Formation of silicided ultra-shallow junctions using implant throug...

Methods for effective nickel silicide formation

Method to form MOS transistors with shallow junctions using laser a...

Patents Applicationslast 30 patents

SLOT DESIGNS IN WIDE METAL LINES

RRAM CELL WITH BOTTOM ELECTRODE(S) POSITIONED IN A SEMICONDUCTOR SU...

LOW OHMIC CONTACTS

Fabrication of RRAM Cell Using CMOS Compatible Processes

METHOD FOR FABRICATING NANO DEVICES

METHOD FOR FORMING A SHALLOW JUNCTION REGION USING DEFECT ENGINEERI...

METHOD FOR FABRICATING SEMICONDUCTOR DEVICES WITH SHALLOW DIFFUSION...

INTEGRATED CIRCUIT STRUCTURE WITH ELECTRICAL STRAP

Formation of strained Si channel and Si1-xGex source/drain structur...

INTEGRATED CIRCUIT SYSTEM USING DUAL DAMASCENE PROCESS

Slot designs in wide metal lines

Method and apparatus for performing nickel salicidation

Dual metal gate process: metals and their silicides

Methods to form dual metal gates by incorporating metals and their...

Methods to form dual metal gates by incorporating metals and their...

Dual metal gate process: metals and their silicides

Methods to form dual metal gates by incorporating metals and their...

Formation of silicided shallow junctions using implant through meta...

Method and apparatus for performing nickel salicidation