Kiyonori Ogura

Person

Kawasaki, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Apparatus and method for masking input of invalid data strobe signal
- Patent number 7,908,507
- Issue date Mar 15, 2011
- Fujitsu Semiconductor Limited
- Kiyonori Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory circuit testing system, semiconductor device, and memory tes...
- Patent number 7,577,884
- Issue date Aug 18, 2009
- Fujitsu Microelectronics Limited
- Kiyonori Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
Test circuit for semiconductor device with multiple memory circuits
- Patent number 6,516,430
- Issue date Feb 4, 2003
- Fujitsu Limited
- Kiyonori Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device with precharge voltage correction circuit
- Patent number 6,147,916
- Issue date Nov 14, 2000
- Fujitsu Limited
- Kiyonori Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor circuit with reduced P-N junction capacitance
- Patent number 5,751,047
- Issue date May 12, 1998
- Fujitsu Limited
- Kiyonori Ogura
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
EEPROM and EEPROM reading method
- Patent number 5,467,310
- Issue date Nov 14, 1995
- Fujitsu Limited
- Masanobu Yoshida
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device
- Patent number 5,440,511
- Issue date Aug 8, 1995
- Fujitsu Limited
- Hiroshi Yamamoto
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable logic device having expanded logic capability
- Patent number 5,053,646
- Issue date Oct 1, 1991
- Fujitsu Limited
- Mitsuo Higuchi
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
Data fetch circuit, data fetch system and control method of the dat...
- Publication number 20090006881
- Publication date Jan 1, 2009
- FUJITSU LIMITED
- Kiyonori Ogura
- G11 - INFORMATION STORAGE
Information Patent Application
Data fetch circuit and control method thereof
- Publication number 20070204185
- Publication date Aug 30, 2007
- FUJITSU LIMITED
- Kiyonori Ogura
- G11 - INFORMATION STORAGE
Information Patent Application
Memory circuit testing system, semiconductor device, and memory tes...
- Publication number 20030212925
- Publication date Nov 13, 2003
- FUJITSU LIMITED
- Kiyonori Ogura
- G11 - INFORMATION STORAGE

Kiyonori Ogura

Person

Patents Grantslast 30 patents

Apparatus and method for masking input of invalid data strobe signal

Memory circuit testing system, semiconductor device, and memory tes...

Test circuit for semiconductor device with multiple memory circuits

Semiconductor memory device with precharge voltage correction circuit

Semiconductor circuit with reduced P-N junction capacitance

EEPROM and EEPROM reading method

Semiconductor memory device

Programmable logic device having expanded logic capability

Patents Applicationslast 30 patents

Data fetch circuit, data fetch system and control method of the dat...

Data fetch circuit and control method thereof

Memory circuit testing system, semiconductor device, and memory tes...