Kumar Nagarajan

Person

Fremont, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor structure and method for interconnection of integrate...
- Patent number 8,841,752
- Issue date Sep 23, 2014
- Xilinx, Inc.
- Raghunandan Chaware
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging devices and methods
- Patent number 8,810,028
- Issue date Aug 19, 2014
- Xilinx, Inc.
- Nael Zohni
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure and method for interconnection of integrate...
- Patent number 8,519,528
- Issue date Aug 27, 2013
- Xilinx, Inc.
- Kumar Nagarajan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Lead-free structures in a semiconductor device
- Patent number 8,410,604
- Issue date Apr 2, 2013
- Xilinx, Inc.
- Laurene Yip
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit assembly having vented heat-spreader
- Patent number 8,258,013
- Issue date Sep 4, 2012
- Xilinx, Inc.
- Kumar Nagarajan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of implementing a capacitor in an integrated circuit
- Patent number 8,084,297
- Issue date Dec 27, 2011
- Xilinx, Inc.
- Mukul Joshi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Circuit for and method of implementing a capacitor in an integrated...
- Patent number 7,791,192
- Issue date Sep 7, 2010
- Xilinx, Inc.
- Mukul Joshi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit having a lid and method of employing a lid on an...
- Patent number 7,473,583
- Issue date Jan 6, 2009
- Xilinx, Inc.
- Kumar Nagarajan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low stress flip-chip package for low-K silicon technology
- Patent number 7,190,082
- Issue date Mar 13, 2007
- LSI Logic Corporation
- Kumar Nagarajan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit having a lid and method of employing a lid on an...
- Patent number 7,187,077
- Issue date Mar 6, 2007
- Xilinx, Inc.
- Kumar Nagarajan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-chip package having a contiguous heat spreader assembly
- Patent number 6,963,129
- Issue date Nov 8, 2005
- LSI Logic Corporation
- Thomas Evans
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Via construction for structural support
- Patent number 6,943,446
- Issue date Sep 13, 2005
- LSI Logic Corporation
- John P. McCormick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electrostatic discharge protection
- Patent number 6,911,736
- Issue date Jun 28, 2005
- LSI Logic Corporation
- Kumar Nagarajan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stiffener design
- Patent number 6,825,066
- Issue date Nov 30, 2004
- LSI Logic Corporation
- Yogendra Ranade
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of balanced coefficient of thermal expansion for flip chip b...
- Patent number 6,806,119
- Issue date Oct 19, 2004
- LSI Logic Corporation
- Kumar Nagarajan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Balanced coefficient of thermal expansion for flip chip ball grid a...
- Patent number 6,639,321
- Issue date Oct 28, 2003
- LSI Logic Corporation
- Kumar Nagarajan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Overmold integrated circuit package
- Patent number 6,519,844
- Issue date Feb 18, 2003
- LSI Logic Corporation
- Kumar Nagarajan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Thin form factor flip chip ball grid array
- Patent number 6,441,499
- Issue date Aug 27, 2002
- LSI Logic Corporation
- Kumar Nagarajan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and structure for reducing the incidence of voiding in an un...
- Patent number 6,320,127
- Issue date Nov 20, 2001
- LSI Logic Corporation
- Kumar Nagarajan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Flip chip ball grid array package with laminated substrate
- Patent number 6,133,064
- Issue date Oct 17, 2000
- LSI Logic Corporation
- Kumar Nagarajan
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
LEAD-FREE STRUCTURES IN A SEMICONDUCTOR DEVICE
- Publication number 20120098130
- Publication date Apr 26, 2012
- Xilinx, Inc.
- Laurene Yip
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Electrostatic discharge protection
- Publication number 20040245632
- Publication date Dec 9, 2004
- Kumar Nagarajan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Low stress flip-chip package for low-K silicon technology
- Publication number 20040188862
- Publication date Sep 30, 2004
- Kumar Nagarajan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of balanced coefficient of thermal expansion for flip chip b...
- Publication number 20040121519
- Publication date Jun 24, 2004
- Kumar Nagarajan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Stiffener design
- Publication number 20040105241
- Publication date Jun 3, 2004
- Yogendra Ranade
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Via construction
- Publication number 20040089953
- Publication date May 13, 2004
- John P. McCormick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Underfill gap enhancement
- Publication number 20040070073
- Publication date Apr 15, 2004
- Shirish Shah
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...

Kumar Nagarajan

Person

Patents Grantslast 30 patents

Semiconductor structure and method for interconnection of integrate...

Integrated circuit packaging devices and methods

Semiconductor structure and method for interconnection of integrate...

Lead-free structures in a semiconductor device

Integrated circuit assembly having vented heat-spreader

Method of implementing a capacitor in an integrated circuit

Circuit for and method of implementing a capacitor in an integrated...

Integrated circuit having a lid and method of employing a lid on an...

Low stress flip-chip package for low-K silicon technology

Integrated circuit having a lid and method of employing a lid on an...

Multi-chip package having a contiguous heat spreader assembly

Via construction for structural support

Electrostatic discharge protection

Stiffener design

Method of balanced coefficient of thermal expansion for flip chip b...

Balanced coefficient of thermal expansion for flip chip ball grid a...

Overmold integrated circuit package

Thin form factor flip chip ball grid array

Method and structure for reducing the incidence of voiding in an un...

Flip chip ball grid array package with laminated substrate

Patents Applicationslast 30 patents

LEAD-FREE STRUCTURES IN A SEMICONDUCTOR DEVICE

Electrostatic discharge protection

Low stress flip-chip package for low-K silicon technology

Method of balanced coefficient of thermal expansion for flip chip b...

Stiffener design

Via construction

Underfill gap enhancement