Kuong Hua Hii

Person

Singapore, SG

People

Patents Grantslast 30 patents

Information Patent Grant
Built-in self-test arrangement for integrated circuit memory devices
- Patent number 7,328,388
- Issue date Feb 5, 2008
- Texas Instruments Incorporated
- Kuong Hua Hii
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Built-in self-test arrangement for integrated circuit memory devices
- Patent number 7,278,078
- Issue date Oct 2, 2007
- Texas Instruments Incorporated
- Kuong Hua Hii
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Built-in self-test arrangement for integrated circuit memory devices
- Patent number 6,801,461
- Issue date Oct 5, 2004
- Texas Instruments Incorporated
- Kuong Hua Hii
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Built-in self-test arrangement for integrated circuit memory devices
- Patent number 6,353,563
- Issue date Mar 5, 2002
- Texas Instruments Incorporated
- Kuong Hua Hii
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Test enable control for built-in self-test
- Patent number 6,014,336
- Issue date Jan 11, 2000
- Texas Instruments Incorporated
- Theo J. Powell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Short disturb test algorithm for built-in self-test
- Patent number 5,991,213
- Issue date Nov 23, 1999
- Texas Instruments Incorporated
- Danny R. Cline
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
ROM embedded mask release number for built-in self-test
- Patent number 5,959,912
- Issue date Sep 28, 1999
- Texas Instruments Incorporated
- Theo J. Powell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data invert jump instruction test for built-in self-test
- Patent number 5,953,272
- Issue date Sep 14, 1999
- Texas Instruments Incorporated
- Theo J. Powell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit memory device having built-in self test circuit...
- Patent number 5,936,900
- Issue date Aug 10, 1999
- Texas Instruments Incorporated
- Kuong Hua Hii
- G11 - INFORMATION STORAGE
Information Patent Grant
Built-in self-test arrangement for integrated circuit memory devices
- Patent number 5,883,843
- Issue date Mar 16, 1999
- Texas Instruments Incorporated
- Kuong Hua Hii
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Internal/external clock option for built-in self test
- Patent number 5,875,153
- Issue date Feb 23, 1999
- Texas Instruments Incorporated
- Kuong Hua Hii
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Built-in self-test arrangement for integrated circuit memory devices
- Publication number 20060242521
- Publication date Oct 26, 2006
- Kuong Hua Hii
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Built-in self-test arrangement for integrated circuit memory devices
- Publication number 20050022084
- Publication date Jan 27, 2005
- Kuong Hua Hii
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Built-in self-test arrangement for integrated circuit memory devices
- Publication number 20020089887
- Publication date Jul 11, 2002
- Kuong Hua Hii
- G01 - MEASURING TESTING
Information Patent Application
Built-in self-test arrangement for integrated circuit memory devices
- Publication number 20020071325
- Publication date Jun 13, 2002
- Kuong Hua Hii
- G01 - MEASURING TESTING

Kuong Hua Hii

Person

Patents Grantslast 30 patents

Built-in self-test arrangement for integrated circuit memory devices

Built-in self-test arrangement for integrated circuit memory devices

Built-in self-test arrangement for integrated circuit memory devices

Built-in self-test arrangement for integrated circuit memory devices

Test enable control for built-in self-test

Short disturb test algorithm for built-in self-test

ROM embedded mask release number for built-in self-test

Data invert jump instruction test for built-in self-test

Integrated circuit memory device having built-in self test circuit...

Built-in self-test arrangement for integrated circuit memory devices

Internal/external clock option for built-in self test

Patents Applicationslast 30 patents

Built-in self-test arrangement for integrated circuit memory devices

Built-in self-test arrangement for integrated circuit memory devices

Built-in self-test arrangement for integrated circuit memory devices

Built-in self-test arrangement for integrated circuit memory devices