L. Randall Mote Jr.

Person

Laguna Hills, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Efficient memory allocation scheme for data collection
- Patent number 7,165,193
- Issue date Jan 16, 2007
- Broadcom Corporation
- Joey Y. Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient memory allocation scheme for data collection
- Patent number 6,836,861
- Issue date Dec 28, 2004
- Broadcom Corporation
- Joey Y. Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Jtag testing of buses using plug-in cards with Jtag logic mounted t...
- Patent number 5,852,617
- Issue date Dec 22, 1998
- SamSung Electronics Co., Ltd.
- L. Randall Mote
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Docking station with serially accessed memory that is powered by a...
- Patent number 5,826,043
- Issue date Oct 20, 1998
- AST Research, Inc.
- Michael G. Smith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for reducing latency time on an interface by o...
- Patent number 5,815,673
- Issue date Sep 29, 1998
- SamSung Electronics Co., Ltd.
- L. Randall Mote
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for testing a megacell in an ASIC using JTAG
- Patent number 5,805,609
- Issue date Sep 8, 1998
- SamSung Electronics Co., Ltd.
- L. Randall Mote
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for reducing cumulative time delay in synchron...
- Patent number 5,764,966
- Issue date Jun 9, 1998
- SamSung Electronics Co., Ltd.
- L. Randall Mote
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Glitch-free clock enable circuit
- Patent number 5,731,715
- Issue date Mar 24, 1998
- Samsung Electronics, Co. Ltd.
- L. Randall Mote
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Queue management mechanism which allows entries to be processed in...
- Patent number 5,666,494
- Issue date Sep 9, 1997
- SamSung Electronics Co., Ltd.
- L. Randall Mote
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Refresh strategy for DRAMs
- Patent number 5,654,929
- Issue date Aug 5, 1997
- SamSung Electronics Co., Ltd.
- L. Randall Mote
- G11 - INFORMATION STORAGE
Information Patent Grant
I/O toggle test method using JTAG
- Patent number 5,648,973
- Issue date Jul 15, 1997
- AST Research, Inc.
- L. Randall Mote
- G01 - MEASURING TESTING
Information Patent Grant
Memory controller which executes read and write commands out of order
- Patent number 5,638,534
- Issue date Jun 10, 1997
- SamSung Electronics Co., Ltd.
- L. Randall Mote
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High impedance test mode for JTAG
- Patent number 5,631,912
- Issue date May 20, 1997
- SamSung Electronics Co., Ltd.
- L. Randall Mote
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for enhancing performance of a processor
- Patent number 5,630,110
- Issue date May 13, 1997
- SamSung Electronics Co., Ltd.
- L. Randall Mote
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Glitch-free clock enable circuit
- Patent number 5,537,062
- Issue date Jul 16, 1996
- AST Research, Inc.
- L. Randall Mote
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Floating fault tolerant input buffer circuit
- Patent number 5,324,996
- Issue date Jun 28, 1994
- AST Research, Inc.
- L. Randall Mote
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
Efficient memory allocation scheme for data collection
- Publication number 20050060504
- Publication date Mar 17, 2005
- Joey Y. Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Efficient memory allocation scheme for data collection
- Publication number 20010017799
- Publication date Aug 30, 2001
- Joey Y. Chen
- G06 - COMPUTING CALCULATING COUNTING

L. Randall Mote Jr.

Person

Patents Grantslast 30 patents

Efficient memory allocation scheme for data collection

Efficient memory allocation scheme for data collection

Jtag testing of buses using plug-in cards with Jtag logic mounted t...

Docking station with serially accessed memory that is powered by a...

Method and apparatus for reducing latency time on an interface by o...

Method and apparatus for testing a megacell in an ASIC using JTAG

Method and apparatus for reducing cumulative time delay in synchron...

Glitch-free clock enable circuit

Queue management mechanism which allows entries to be processed in...

Refresh strategy for DRAMs

I/O toggle test method using JTAG

Memory controller which executes read and write commands out of order

High impedance test mode for JTAG

Method and apparatus for enhancing performance of a processor

Glitch-free clock enable circuit

Floating fault tolerant input buffer circuit

Patents Applicationslast 30 patents

Efficient memory allocation scheme for data collection

Efficient memory allocation scheme for data collection