Larry L. Moresco

Person

San Carlos, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method and apparatus for encoding information in an IC package
- Patent number 6,798,076
- Issue date Sep 28, 2004
- Intel Corporation
- John W. Horigan
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Methods of planarizing structures on wafers and substrates by polis...
- Patent number 6,733,685
- Issue date May 11, 2004
- Fujitsu Limited
- Solomon I. Beilin
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Thermo-electric signal coupler
- Patent number 6,539,137
- Issue date Mar 25, 2003
- Fujitsu Limited
- Larry L. Moresco
- G01 - MEASURING TESTING
Information Patent Grant
Multichip module substrates with buried discrete capacitors and com...
- Patent number 6,535,398
- Issue date Mar 18, 2003
- Fujitsu Limited
- Larry L. Moresco
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Socketable BGA package
- Patent number 6,404,047
- Issue date Jun 11, 2002
- Intel Corporation
- Kevin J. Haley
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for optimizing cost of manufacturing memory arrays
- Patent number 6,324,436
- Issue date Nov 27, 2001
- Fujitsu Limited
- Larry L. Moresco
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flexible foil finned heatsink structure and method of making same
- Patent number 6,223,814
- Issue date May 1, 2001
- Fujitsu Limited
- Larry L. Moresco
- F28 - HEAT EXCHANGE IN GENERAL
Information Patent Grant
Controlling the heat expansion of electrical couplings
- Patent number 6,221,459
- Issue date Apr 24, 2001
- Intel Corporation
- Gregory A. James
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Socketable BGA package
- Patent number 6,168,976
- Issue date Jan 2, 2001
- Intel Corporation
- Kevin J. Haley
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Universal multichip interconnect systems
- Patent number 6,111,756
- Issue date Aug 29, 2000
- Fujitsu Limited
- Larry L. Moresco
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Controlled impedance interposer substrate and method of making
- Patent number 6,102,710
- Issue date Aug 15, 2000
- Fujitsu Limited
- Solomon I. Beilin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Power supply distribution structure for integrated circuit chip mod...
- Patent number 6,034,332
- Issue date Mar 7, 2000
- Fujitsu Limited
- Larry Louis Moresco
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Flexible foil finned heatsink structure and method of making same
- Patent number 6,026,895
- Issue date Feb 22, 2000
- Fujitsu Limited
- Larry L. Moresco
- F28 - HEAT EXCHANGE IN GENERAL
Information Patent Grant
Structure and fabrication procedure for a stable post
- Patent number 5,930,890
- Issue date Aug 3, 1999
- Fujitsu Limited
- William T. Chou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of planarizing structures on wafers and substrates by polis...
- Patent number 5,916,453
- Issue date Jun 29, 1999
- Fujitsu Limited
- Solomon I. Beilin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Diffusion bonded interconnect
- Patent number 5,897,341
- Issue date Apr 27, 1999
- Fujitsu Limited
- David G. Love
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Controlled impedence interposer substrate
- Patent number 5,854,534
- Issue date Dec 29, 1998
- Fujitsu Limited
- Solomon I. Beilin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wire interconnect structures for connecting an integrated circuit t...
- Patent number 5,773,889
- Issue date Jun 30, 1998
- Fujitsu Limited
- David George Love
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of manufacturing power supply distribution structures for m...
- Patent number 5,765,279
- Issue date Jun 16, 1998
- Fujitsu Limited
- Larry Louis Moresco
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fabrication procedure for a stable post
- Patent number 5,722,162
- Issue date Mar 3, 1998
- Fujitsu Limited
- William T. Chou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making a three-dimensional multichip module
- Patent number 5,655,290
- Issue date Aug 12, 1997
- Fujitsu Limited
- Larry L. Moresco
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wire interconnect structures for connecting an integrated circuit t...
- Patent number 5,536,362
- Issue date Jul 16, 1996
- Fujitsu Limited
- David G. Love
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus for cooling semiconductor chips in multichip modules
- Patent number 5,514,906
- Issue date May 7, 1996
- Fujitsu Limited
- David G. Love
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three-dimensional multichip module
- Patent number 5,426,563
- Issue date Jun 20, 1995
- Fujitsu Limited
- Larry L. Moresco
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interconnect capacitors
- Patent number 5,404,265
- Issue date Apr 4, 1995
- Fujitsu Limited
- Larry L. Moresco
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wire interconnect structures for connecting an integrated circuit t...
- Patent number 5,334,804
- Issue date Aug 2, 1994
- Fujitsu Limited
- David G. Love
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
METHOD AND APPARATUS FOR ENCODING INFORMATION IN AN IC PACKAGE
- Publication number 20030116868
- Publication date Jun 26, 2003
- JOHN W. HORIGAN
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Methods of planarizing structures on wafers and substrates by polis...
- Publication number 20010042734
- Publication date Nov 22, 2001
- Solomon I. Beilin
- H01 - BASIC ELECTRIC ELEMENTS

Larry L. Moresco

Person

Patents Grantslast 30 patents

Method and apparatus for encoding information in an IC package

Methods of planarizing structures on wafers and substrates by polis...

Thermo-electric signal coupler

Multichip module substrates with buried discrete capacitors and com...

Socketable BGA package

Method for optimizing cost of manufacturing memory arrays

Flexible foil finned heatsink structure and method of making same

Controlling the heat expansion of electrical couplings

Socketable BGA package

Universal multichip interconnect systems

Controlled impedance interposer substrate and method of making

Power supply distribution structure for integrated circuit chip mod...

Flexible foil finned heatsink structure and method of making same

Structure and fabrication procedure for a stable post

Methods of planarizing structures on wafers and substrates by polis...

Diffusion bonded interconnect

Controlled impedence interposer substrate

Wire interconnect structures for connecting an integrated circuit t...

Methods of manufacturing power supply distribution structures for m...

Fabrication procedure for a stable post

Method for making a three-dimensional multichip module

Wire interconnect structures for connecting an integrated circuit t...

Apparatus for cooling semiconductor chips in multichip modules

Three-dimensional multichip module

Interconnect capacitors

Wire interconnect structures for connecting an integrated circuit t...

Patents Applicationslast 30 patents

METHOD AND APPARATUS FOR ENCODING INFORMATION IN AN IC PACKAGE

Methods of planarizing structures on wafers and substrates by polis...