Lav Ivanovic

Person

Cupertino, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Low depth combinational finite field multiplier
- Patent number 9,417,847
- Issue date Aug 16, 2016
- Intel Corporation
- Sergey B. Gashkov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Impulse regular expression matching
- Patent number 9,177,251
- Issue date Nov 3, 2015
- Intel Corporation
- Alexander Podkolzin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for variable redundancy data protection
- Patent number 9,043,684
- Issue date May 26, 2015
- LSI Corporation
- Shaohua Yang
- G11 - INFORMATION STORAGE
Information Patent Grant
Low density parity check decoder with miscorrection handling
- Patent number 8,996,969
- Issue date Mar 31, 2015
- LSI Corporation
- Anatoli A. Bolotov
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
LDPC decoder trapping set identification
- Patent number 8,996,971
- Issue date Mar 31, 2015
- LSI Corporation
- Fan Zhang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Majority-tabular post processing of quasi-cyclic low-density parity...
- Patent number 8,977,939
- Issue date Mar 10, 2015
- LSI Corporation
- Alexander S. Podkolzin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Correcting errors in miscorrected codewords using list decoding
- Patent number 8,898,539
- Issue date Nov 25, 2014
- LSI Corporation
- Yang Han
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Unified architecture for crypto functional units
- Patent number 8,831,221
- Issue date Sep 9, 2014
- LSI Corporation
- Anatoli A. Bolotov
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Dynamically controlling the number of local iterations in an iterat...
- Patent number 8,832,532
- Issue date Sep 9, 2014
- LSI Corporation
- Anatoli A. Bolotov
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Systems and methods for locating and correcting decoder mis-correct...
- Patent number 8,782,487
- Issue date Jul 15, 2014
- LSI Corporation
- Shaohua Yang
- G11 - INFORMATION STORAGE
Information Patent Grant
High throughput frame check sequence module architecture
- Patent number 8,683,291
- Issue date Mar 25, 2014
- LSI Corporation
- Mikhail I. Grinchuk
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Cipher independent interface for cryptographic hardware service
- Patent number 8,654,969
- Issue date Feb 18, 2014
- LSI Corporation
- Anatoli Bolotov
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Impulse regular expression matching
- Patent number 8,650,146
- Issue date Feb 11, 2014
- LSI Corporation
- Alexander Podkolzin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Alternate galois field advanced encryption standard round
- Patent number 8,411,853
- Issue date Apr 2, 2013
- LSI Corporation
- Paul G. Filseth
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
High performance arithmetic logic unit (ALU) for cryptographic appl...
- Patent number 8,359,479
- Issue date Jan 22, 2013
- LSI Corporation
- Mikhail I. Grinchuk
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Architecture and implementation method of programmable arithmetic c...
- Patent number 8,302,083
- Issue date Oct 30, 2012
- LSI Corporation
- Anatoli A. Bolotov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low depth programmable priority encoders
- Patent number 8,063,659
- Issue date Nov 22, 2011
- LSI Corporation
- Mikhail Grinchuk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multimode block cipher architectures
- Patent number 8,023,644
- Issue date Sep 20, 2011
- LSI Corporation
- Anatoli A. Bolotov
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Flexible hardware architecture for ECC/HECC based cryptography
- Patent number 7,961,872
- Issue date Jun 14, 2011
- LSI Corporation
- Anatoli A. Bolotov
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Low depth programmable priority encoders
- Patent number 7,839,164
- Issue date Nov 23, 2010
- LSI Corporation
- Mikhail Grinchuk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reflectivity optimization for multilayer stacks
- Patent number 7,634,389
- Issue date Dec 15, 2009
- LSI Corporation
- Lav Ivanovic
- G02 - OPTICS
Information Patent Grant
OPC based illumination optimization with mask error constraints
- Patent number 7,264,906
- Issue date Sep 4, 2007
- LSI Corporation
- Ebo H. Croffie
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Adaptive Sem edge recognition algorithm
- Patent number 7,171,047
- Issue date Jan 30, 2007
- LSI Logic Corporation
- Mikhail Grinchuk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for classifying an integrated circuit for optical...
- Patent number 7,093,228
- Issue date Aug 15, 2006
- LSI Logic Corporation
- Alexandre Andreev
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Built-in test for multiple memory circuits
- Patent number 6,941,494
- Issue date Sep 6, 2005
- LSI Logic Corporation
- Alexander E. Andreev
- G11 - INFORMATION STORAGE
Information Patent Grant
Automatic calibration of a masking process simulator
- Patent number 6,868,355
- Issue date Mar 15, 2005
- LSI Logic Corporation
- Lav Ivanovic
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Automatic calibration of a masking process simulator
- Patent number 6,768,958
- Issue date Jul 27, 2004
- LSI Logic Corporation
- Lav Ivanovic
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Power routing with obstacles
- Patent number 6,757,881
- Issue date Jun 29, 2004
- LSI Logic Corporation
- Alexandre E. Andreev
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
ε-discrepant self-test technique
- Patent number 6,467,067
- Issue date Oct 15, 2002
- LSI Logic Corporation
- Alexander E. Andreev
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
MULTI-READ PORT MEMORY
- Publication number 20140281284
- Publication date Sep 18, 2014
- Stefan G. Block
- G11 - INFORMATION STORAGE
Information Patent Application
Majority-Tabular Post Processing of Quasi-Cyclic Low-Density Parity...
- Publication number 20140181624
- Publication date Jun 26, 2014
- LSI Corporation
- Alexander S. Podkolzin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Low Density Parity Check Decoder With Miscorrection Handling
- Publication number 20140164866
- Publication date Jun 12, 2014
- LSI Corporation
- Anatoli A. Bolotov
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
IMPULSE REGULAR EXPRESSION MATCHING
- Publication number 20140136465
- Publication date May 15, 2014
- LSI Corporation
- Alexander Podkolzin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CORRECTING ERRORS IN MISCORRECTED CODEWORDS USING LIST DECODING
- Publication number 20140075264
- Publication date Mar 13, 2014
- LSI Corporation
- Yang Han
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
LDPC Decoder Trapping Set Identification
- Publication number 20140068367
- Publication date Mar 6, 2014
- LSI CORPORATION
- Fan Zhang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMICALLY CONTROLLING THE NUMBER OF LOCAL ITERATIONS IN AN ITERAT...
- Publication number 20130346824
- Publication date Dec 26, 2013
- LSI Corporation
- Anatoli A. Bolotov
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Systems and Methods for Locating and Correcting Decoder Mis-Correct...
- Publication number 20130283114
- Publication date Oct 24, 2013
- LSI CORPORATION
- Shaohua Yang
- G11 - INFORMATION STORAGE
Information Patent Application
Systems and Methods for Variable Redundancy Data Protection
- Publication number 20130254623
- Publication date Sep 26, 2013
- LSI CORPORATION
- Shaohua Yang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ARCHITECTURE AND IMPLEMENTATION METHOD OF PROGRAMMABLE ARITHMETIC C...
- Publication number 20130024668
- Publication date Jan 24, 2013
- LSI Corporation
- Anatoli Bolotov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH THROUGHPUT FRAME CHECK SEQUENCE MODULE ARCHITECTURE
- Publication number 20120324319
- Publication date Dec 20, 2012
- LSI CORPORATION
- Mikhail I. Grinchuk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW DEPTH COMBINATIONAL FINITE FIELD MULTIPLIER
- Publication number 20120226731
- Publication date Sep 6, 2012
- Sergey B. Gashkov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CIPHER INDEPENDENT INTERFACE FOR CRYPTOGRAPHIC HARDWARE SERVICE
- Publication number 20120121079
- Publication date May 17, 2012
- Anatoli Bolotov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
UNIFIED ARCHITECTURE FOR CRYPTO FUNCTIONAL UNITS
- Publication number 20120076298
- Publication date Mar 29, 2012
- Anatoli A. Bolotov
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
IMPULSE REGULAR EXPRESSION MATCHING
- Publication number 20110320397
- Publication date Dec 29, 2011
- Alexander Podkolzin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE-MODE CRYPTOGRAPHIC MODULE USABLE WITH MEMORY CONTROLLERS
- Publication number 20110255689
- Publication date Oct 20, 2011
- LSI Corporation
- Anatoli Bolotov
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
LOW DEPTH PROGRAMMABLE PRIORITY ENCODERS
- Publication number 20110029980
- Publication date Feb 3, 2011
- Mikhail Grinchuk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW DEPTH PROGRAMMABLE PRIORITY ENCODERS
- Publication number 20100293421
- Publication date Nov 18, 2010
- Mikhail Grinchuk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Architecture and implementation method of programmable arithmetic c...
- Publication number 20100191935
- Publication date Jul 29, 2010
- Anatoli A. Bolotov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFICIENT IMPLEMENTATION OF ARITHMETICAL SECURE HASH TECHNIQUES
- Publication number 20100086127
- Publication date Apr 8, 2010
- Mikhail Grinchuk
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Alternate galois field advanced encryption standard round
- Publication number 20100057823
- Publication date Mar 4, 2010
- Paul G. Filseth
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
High performance arithmetic logic unit (ALU) for cryptographic appl...
- Publication number 20100017622
- Publication date Jan 21, 2010
- Mikhail I. Grinchuk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Flexible hardware architecture for ECC/HECC based crytography
- Publication number 20080130873
- Publication date Jun 5, 2008
- LSI Corporation
- Anatoli A. Bolotov
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
MULTIMODE BLOCK CIPHER ARCHITECTURES
- Publication number 20080130872
- Publication date Jun 5, 2008
- LSI Corporation
- Anatoli A. Bolotov
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
OPC based illumination optimization with mask error constraints
- Publication number 20050196681
- Publication date Sep 8, 2005
- Ebo H. Croffle
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Reflectivity optimization for multilayer stacks
- Publication number 20050114094
- Publication date May 26, 2005
- Lav Ivanovic
- G02 - OPTICS
Information Patent Application
Automatic calibration of a masking process simulator
- Publication number 20040199349
- Publication date Oct 7, 2004
- Lav Ivanovic
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Adaptive SEM edge recognition algorithm
- Publication number 20040120578
- Publication date Jun 24, 2004
- Mikhail Grinchuk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and system for classifying an integrated circut for optical...
- Publication number 20040123265
- Publication date Jun 24, 2004
- Alexandre Andreev
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
AUTOMATIC CALIBRATION OF A MASKING PROCESS SIMULATOR
- Publication number 20040102912
- Publication date May 27, 2004
- Lav Ivanovic
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY

Lav Ivanovic

Person

Patents Grantslast 30 patents

Low depth combinational finite field multiplier

Impulse regular expression matching

Systems and methods for variable redundancy data protection

Low density parity check decoder with miscorrection handling

LDPC decoder trapping set identification

Majority-tabular post processing of quasi-cyclic low-density parity...

Correcting errors in miscorrected codewords using list decoding

Unified architecture for crypto functional units

Dynamically controlling the number of local iterations in an iterat...

Systems and methods for locating and correcting decoder mis-correct...

High throughput frame check sequence module architecture

Cipher independent interface for cryptographic hardware service

Impulse regular expression matching

Alternate galois field advanced encryption standard round

High performance arithmetic logic unit (ALU) for cryptographic appl...

Architecture and implementation method of programmable arithmetic c...

Low depth programmable priority encoders

Multimode block cipher architectures

Flexible hardware architecture for ECC/HECC based cryptography

Low depth programmable priority encoders

Reflectivity optimization for multilayer stacks

OPC based illumination optimization with mask error constraints

Adaptive Sem edge recognition algorithm

Method and system for classifying an integrated circuit for optical...

Built-in test for multiple memory circuits

Automatic calibration of a masking process simulator

Automatic calibration of a masking process simulator

Power routing with obstacles

&#x03B5;-discrepant self-test technique

Patents Applicationslast 30 patents

MULTI-READ PORT MEMORY

Majority-Tabular Post Processing of Quasi-Cyclic Low-Density Parity...

Low Density Parity Check Decoder With Miscorrection Handling

IMPULSE REGULAR EXPRESSION MATCHING

CORRECTING ERRORS IN MISCORRECTED CODEWORDS USING LIST DECODING

LDPC Decoder Trapping Set Identification

DYNAMICALLY CONTROLLING THE NUMBER OF LOCAL ITERATIONS IN AN ITERAT...

Systems and Methods for Locating and Correcting Decoder Mis-Correct...

Systems and Methods for Variable Redundancy Data Protection

ARCHITECTURE AND IMPLEMENTATION METHOD OF PROGRAMMABLE ARITHMETIC C...

HIGH THROUGHPUT FRAME CHECK SEQUENCE MODULE ARCHITECTURE

LOW DEPTH COMBINATIONAL FINITE FIELD MULTIPLIER

CIPHER INDEPENDENT INTERFACE FOR CRYPTOGRAPHIC HARDWARE SERVICE

UNIFIED ARCHITECTURE FOR CRYPTO FUNCTIONAL UNITS

IMPULSE REGULAR EXPRESSION MATCHING

MULTIPLE-MODE CRYPTOGRAPHIC MODULE USABLE WITH MEMORY CONTROLLERS

LOW DEPTH PROGRAMMABLE PRIORITY ENCODERS

LOW DEPTH PROGRAMMABLE PRIORITY ENCODERS

Architecture and implementation method of programmable arithmetic c...

EFFICIENT IMPLEMENTATION OF ARITHMETICAL SECURE HASH TECHNIQUES

Alternate galois field advanced encryption standard round

High performance arithmetic logic unit (ALU) for cryptographic appl...

Flexible hardware architecture for ECC/HECC based crytography

MULTIMODE BLOCK CIPHER ARCHITECTURES

OPC based illumination optimization with mask error constraints

Reflectivity optimization for multilayer stacks

Automatic calibration of a masking process simulator

Adaptive SEM edge recognition algorithm

Method and system for classifying an integrated circut for optical...

AUTOMATIC CALIBRATION OF A MASKING PROCESS SIMULATOR

ε-discrepant self-test technique