Lawrence N. Herr

Person

Coupland, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method and apparatus to improve reliability of vias
- Patent number 9,041,209
- Issue date May 26, 2015
- FREESCALE SEMICONDUCTOR, INC.
- Douglas M. Reber
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus to improve reliability of isolated vias
- Patent number 8,486,839
- Issue date Jul 16, 2013
- FREESCALE SEMICONDUCTOR, INC.
- Douglas M. Reber
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit having an array supply voltage control circuit
- Patent number 8,264,896
- Issue date Sep 11, 2012
- FREESCALE SEMICONDUCTOR, INC.
- Bikas Maiti
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of making an integrated circuit package with shielding via r...
- Patent number 8,097,494
- Issue date Jan 17, 2012
- FREESCALE SEMICONDUCTOR, INC.
- Jinbang Tang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming an integrated circuit
- Patent number 7,824,988
- Issue date Nov 2, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Alexander Hoefler
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Level detect circuit
- Patent number 7,787,323
- Issue date Aug 31, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Lawrence N. Herr
- G11 - INFORMATION STORAGE
Information Patent Grant
Electromagnetic shield formation for integrated circuit die package
- Patent number 7,651,889
- Issue date Jan 26, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Jinbang Tang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Two-port SRAM having improved write operation
- Patent number 7,440,313
- Issue date Oct 21, 2008
- FREESCALE SEMICONDUCTOR, INC.
- Glenn C. Abeln
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for soft defect detection in a memory
- Patent number 6,590,818
- Issue date Jul 8, 2003
- Motorola, Inc.
- Thomas W. Liston
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for testing a static RAM
- Patent number 5,687,178
- Issue date Nov 11, 1997
- Motorola, Inc.
- Lawrence Norman Herr
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit memory having a power supply independent input b...
- Patent number 5,554,942
- Issue date Sep 10, 1996
- Motorola Inc.
- Lawrence N. Herr
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
METHOD AND APPARATUS TO IMPROVE RELIABILITY OF VIAS
- Publication number 20130127064
- Publication date May 23, 2013
- Douglas M. Reber
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS TO IMPROVE RELIABILITY OF ISOLATED VIAS
- Publication number 20120299190
- Publication date Nov 29, 2012
- DOUGLAS M. REBER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ELECTROMAGNETIC SHIELD FORMATION FOR INTEGRATED CIRCUIT DIE PACKAGE
- Publication number 20110003435
- Publication date Jan 6, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Jinbang Tang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING AN INTEGRATED CIRCUIT
- Publication number 20100181629
- Publication date Jul 22, 2010
- Alexander Hoefler
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT HAVING AN ARRAY SUPPLY VOLTAGE CONTROL CIRCUIT
- Publication number 20100027360
- Publication date Feb 4, 2010
- BIKAS MAITI
- G11 - INFORMATION STORAGE
Information Patent Application
ELECTROMAGNETIC SHIELD FORMATION FOR INTEGRATED CIRCUIT DIE PACKAGE
- Publication number 20090075428
- Publication date Mar 19, 2009
- FREESCALE SEMICONDUCTOR, INC.
- Jinbang Tang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LEVEL DETECT CIRCUIT
- Publication number 20080266994
- Publication date Oct 30, 2008
- Lawrence N. Herr
- G11 - INFORMATION STORAGE
Information Patent Application
TWO-PORT SRAM HAVING IMPROVED WRITE OPERATION
- Publication number 20080117665
- Publication date May 22, 2008
- Glenn C. Abeln
- G11 - INFORMATION STORAGE

Lawrence N. Herr

Person

Patents Grantslast 30 patents

Method and apparatus to improve reliability of vias

Methods and apparatus to improve reliability of isolated vias

Integrated circuit having an array supply voltage control circuit

Method of making an integrated circuit package with shielding via r...

Method of forming an integrated circuit

Level detect circuit

Electromagnetic shield formation for integrated circuit die package

Two-port SRAM having improved write operation

Method and apparatus for soft defect detection in a memory

Method and apparatus for testing a static RAM

Integrated circuit memory having a power supply independent input b...

Patents Applicationslast 30 patents

METHOD AND APPARATUS TO IMPROVE RELIABILITY OF VIAS

METHODS AND APPARATUS TO IMPROVE RELIABILITY OF ISOLATED VIAS

ELECTROMAGNETIC SHIELD FORMATION FOR INTEGRATED CIRCUIT DIE PACKAGE

METHOD OF FORMING AN INTEGRATED CIRCUIT

INTEGRATED CIRCUIT HAVING AN ARRAY SUPPLY VOLTAGE CONTROL CIRCUIT

ELECTROMAGNETIC SHIELD FORMATION FOR INTEGRATED CIRCUIT DIE PACKAGE

LEVEL DETECT CIRCUIT

TWO-PORT SRAM HAVING IMPROVED WRITE OPERATION