Lei Chen

Person

Milpitas, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method and apparatus to improve read latency of a multi-threshold l...
- Patent number 12,154,620
- Issue date Nov 26, 2024
- SK hynix NAND Product Solutions Corp.
- Lei Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cluster gateway to multiple filesystems
- Patent number 11,151,094
- Issue date Oct 19, 2021
- EMC IP Holding Company, LLC
- Yunfeng Yang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques to a set voltage level for a data access
- Patent number 10,789,124
- Issue date Sep 29, 2020
- Intel Corporation
- Lei Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Proactive reduction of re-read triggering
- Patent number 10,629,273
- Issue date Apr 21, 2020
- Intel Corporation
- Lei Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Synchronous rectifier controller for offline power converter and me...
- Patent number 10,523,110
- Issue date Dec 31, 2019
- Semiconductor Components Industries, LLC
- Zhibo Tao
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Synchronous rectifier turn-on enable
- Patent number 10,177,645
- Issue date Jan 8, 2019
- Semiconductor Components Industries, LLC
- Zhibo Tao
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
System and method for utilizing history information in a memory device
- Patent number 10,108,471
- Issue date Oct 23, 2018
- SanDisk Technologies LLC
- Zhenlei Shen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flyback converter and controller using counter and current emulator
- Patent number 10,038,385
- Issue date Jul 31, 2018
- FAIRCHILD SEMICONDUCTOR CORPORATION
- Lei Chen
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Self-tuning adaptive dead time control for continuous conduction mo...
- Patent number 10,027,235
- Issue date Jul 17, 2018
- FAIRCHILD SEMICONDUCTOR CORPORATION
- Hangseok Choi
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Adaptive turn-off trigger blanking for synchronous rectification
- Patent number 10,008,950
- Issue date Jun 26, 2018
- Semiconductor Components Industries, LLC
- Hangseok Choi
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Adaptive turn-off trigger blanking for synchronous rectification
- Patent number 9,825,548
- Issue date Nov 21, 2017
- Fairchild Semiconductor Corporation
- Hangseok Choi
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Metalblock relinking to physical blocks of semiconductor memory in...
- Patent number 9,626,289
- Issue date Apr 18, 2017
- SanDisk Technologies LLC
- Lei Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Load balanced decoding of low-density parity-check codes
- Patent number 9,281,841
- Issue date Mar 8, 2016
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Lei Chen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Efficient memory content access
- Patent number 9,262,349
- Issue date Feb 16, 2016
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Herjen Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
LEH memory module architecture design in the multi-level LDPC coded...
- Patent number 9,219,504
- Issue date Dec 22, 2015
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Zongwang Li
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Buffer for managing data samples in a read channel
- Patent number 9,189,379
- Issue date Nov 17, 2015
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Herjen Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Hardware architecture and implementation of low power layered multi...
- Patent number 9,037,938
- Issue date May 19, 2015
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Lei Chen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Modified targeted symbol flipping for non-binary LDPC codes
- Patent number 8,977,926
- Issue date Mar 10, 2015
- LSI Corporation
- Chung-Li Wang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Optimized scheme and architecture of hard drive queue design
- Patent number 8,972,832
- Issue date Mar 3, 2015
- LSI Corporation
- Ngok Ning Chu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Systems and methods for combined binary and non-binary data processing
- Patent number 8,947,804
- Issue date Feb 3, 2015
- LSI Corporation
- Zongwang Li
- G11 - INFORMATION STORAGE
Information Patent Grant
Symbol flipping data processor
- Patent number 8,850,295
- Issue date Sep 30, 2014
- LSI Corporation
- Lei Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods for defect scanning
- Patent number 8,826,110
- Issue date Sep 2, 2014
- LSI Corporation
- Ming Jin
- G11 - INFORMATION STORAGE
Information Patent Grant
Mixed domain FFT-based non-binary LDPC decoder
- Patent number 8,819,515
- Issue date Aug 26, 2014
- LSI Corporation
- Lei Chen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Data sequence detection in band-limited channels using two stream d...
- Patent number 8,810,950
- Issue date Aug 19, 2014
- LSI Corporation
- Madhusudan Kalluri
- G11 - INFORMATION STORAGE
Information Patent Grant
Adaptive maximum a posteriori (MAP) detector in read channel
- Patent number 8,797,666
- Issue date Aug 5, 2014
- LSI Corporation
- Haitao Xia
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Data processing system with failure recovery
- Patent number 8,775,897
- Issue date Jul 8, 2014
- LSI Corporation
- Chung-Li Wang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Multi-level LDPC layer decoder
- Patent number 8,756,478
- Issue date Jun 17, 2014
- LSI Corporation
- Chung-Li Wang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Systems and methods for reduced power multi-layer data decoding
- Patent number 8,751,913
- Issue date Jun 10, 2014
- LSI Corporation
- Zongwang Li
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Symbol flipping LDPC decoding system
- Patent number 8,739,004
- Issue date May 27, 2014
- LSI Corporation
- Sancar K. Olcay
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Power management for storage device read channel
- Patent number 8,730,603
- Issue date May 20, 2014
- LSI Corporation
- Jing Lu
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
METHOD AND APPARATUS TO IMPROVE READ LATENCY OF A MULTI-THRESHOLD L...
- Publication number 20200027503
- Publication date Jan 23, 2020
- Intel Corporation
- Lei CHEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROACTIVE REDUCTION OF RE-READ TRIGGERING
- Publication number 20190180829
- Publication date Jun 13, 2019
- Intel Corporation
- Lei Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYNCHRONOUS RECTIFIER CONTROLLER FOR OFFLINE POWER CONVERTER AND ME...
- Publication number 20190097521
- Publication date Mar 28, 2019
- Semiconductor Components Industries, LLC
- Zhibo TAO
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
TECHNIQUES TO A SET VOLTAGE LEVEL FOR A DATA ACCESS
- Publication number 20190042356
- Publication date Feb 7, 2019
- Intel Corporation
- Lei CHEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYNCHRONOUS RECTIFIER TURN-ON ENABLE
- Publication number 20180358885
- Publication date Dec 13, 2018
- Semiconductor Components Industries, LLC
- Zhibo TAO
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
ADAPTIVE TURN-OFF TRIGGER BLANKING FOR SYNCHRONOUS RECTIFICATION
- Publication number 20180048241
- Publication date Feb 15, 2018
- FAIRCHILD SEMICONDUCTOR CORPORATION
- Hangseok CHOI
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
SEMICONDUCTOR DEVICE AND METHOD THEREFOR
- Publication number 20170302184
- Publication date Oct 19, 2017
- FAIRCHILD SEMICONDUCTOR CORPORATION
- Lei CHEN
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
SELF-TUNING ADAPTIVE DEAD TIME CONTROL FOR CONTINUOUS CONDUCTION MO...
- Publication number 20170222569
- Publication date Aug 3, 2017
- FAIRCHILD SEMICONDUCTOR CORPORATION
- Hangseok CHOI
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
ADAPTIVE TURN-OFF TRIGGER BLANKING FOR SYNCHRONOUS RECTIFICATION
- Publication number 20170222568
- Publication date Aug 3, 2017
- FAIRCHILD SEMICONDUCTOR CORPORATION
- Hangseok CHOI
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
System and Method for Utilizing History Information in a Memory Device
- Publication number 20160188401
- Publication date Jun 30, 2016
- SANDISK TECHNOLOGIES INC.
- Zhenlei Shen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METABLOCK RELINKING SCHEME IN ADAPTIVE WEAR LEVELING
- Publication number 20160062881
- Publication date Mar 3, 2016
- SANDISK TECHNOLOGIES INC.
- Lei Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH DISPLACEMENT ULTRASONIC TRANSDUCER
- Publication number 20160023244
- Publication date Jan 28, 2016
- Kolo Medical Ltd.
- Xuefeng Zhuang
- B06 - GENERATING OR TRANSMITTING MECHANICAL VIBRATIONS IN GENERAL
Information Patent Application
Buffer for Managing Data Samples in a Read Channel
- Publication number 20140223114
- Publication date Aug 7, 2014
- LSI Corporation
- Herjen Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Flexible Low Density Parity Check Code Seed
- Publication number 20140129905
- Publication date May 8, 2014
- LSI Corporation
- Lei Chen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
LEH Memory Module Architecture Design in the Multi-Level LDPC Coded...
- Publication number 20140122971
- Publication date May 1, 2014
- LSI Corporation
- Zongwang Li
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Load Balanced Decoding of Low-Density Parity-Check Codes
- Publication number 20140122959
- Publication date May 1, 2014
- LSI CORPORATION
- Lei Chen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Hardware Architecture and Implementation of Low Power Layered Multi...
- Publication number 20140122979
- Publication date May 1, 2014
- LSI Corporation
- Lei Chen
- G11 - INFORMATION STORAGE
Information Patent Application
ADAPTIVE MAXIMUM A POSTERIORI (MAP) DETECTOR IN READ CHANNEL
- Publication number 20140105266
- Publication date Apr 17, 2014
- LSI Corporation
- Haitao Xia
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
DATA RECOVERY USING NO SYNC MARK RETRY
- Publication number 20140104719
- Publication date Apr 17, 2014
- LSI Corporation
- Chu N. Ying
- G11 - INFORMATION STORAGE
Information Patent Application
MODIFIED TARGETED SYMBOL FLIPPING FOR NON-BINARY LDPC CODES
- Publication number 20140095954
- Publication date Apr 3, 2014
- LSI Corporation
- Chung-Li Wang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
POWER MANAGEMENT FOR STORAGE DEVICE READ CHANNEL
- Publication number 20140071558
- Publication date Mar 13, 2014
- LSI Corporation
- Jing Lu
- G11 - INFORMATION STORAGE
Information Patent Application
OPTIMIZED SCHEME AND ARCHITECTURE OF HARD DRIVE QUEUE DESIGN
- Publication number 20140068389
- Publication date Mar 6, 2014
- LSI Corporation
- Ngok Ning Chu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
EFFICIENT MEMORY CONTENT ACCESS
- Publication number 20140068164
- Publication date Mar 6, 2014
- LSI Corporation
- Herjen Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Systems and Methods for Defect Scanning
- Publication number 20140026004
- Publication date Jan 23, 2014
- LSI CORPORATION
- Ming Jin
- G11 - INFORMATION STORAGE
Information Patent Application
Symbol Flipping LDPC Decoding System
- Publication number 20130305114
- Publication date Nov 14, 2013
- LSI CORPORATION
- Sancar K. Olcay
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Data Processing System with Failure Recovery
- Publication number 20130297983
- Publication date Nov 7, 2013
- LSI CORPORATION
- Chung-Li Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-Section Non-Binary LDPC Decoder
- Publication number 20130275827
- Publication date Oct 17, 2013
- LSI CORPORATION
- Chung-Li Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Symbol Flipping Data Processor
- Publication number 20130198580
- Publication date Aug 1, 2013
- LSI CORPORATION
- Lei Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Mixed Domain FFT-Based Non-Binary LDPC Decoder
- Publication number 20130173988
- Publication date Jul 4, 2013
- LSI CORPORATION
- Lei Chen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Systems and Methods for Combined Binary and Non-Binary Data Processing
- Publication number 20130148232
- Publication date Jun 13, 2013
- LSI CORPORATION
- Zongwang Li
- G11 - INFORMATION STORAGE

Person

Patents Grantslast 30 patents

Method and apparatus to improve read latency of a multi-threshold l...

Cluster gateway to multiple filesystems

Techniques to a set voltage level for a data access

Proactive reduction of re-read triggering

Synchronous rectifier controller for offline power converter and me...

Synchronous rectifier turn-on enable

System and method for utilizing history information in a memory device

Flyback converter and controller using counter and current emulator

Self-tuning adaptive dead time control for continuous conduction mo...

Adaptive turn-off trigger blanking for synchronous rectification

Adaptive turn-off trigger blanking for synchronous rectification

Metalblock relinking to physical blocks of semiconductor memory in...

Load balanced decoding of low-density parity-check codes

Efficient memory content access

LEH memory module architecture design in the multi-level LDPC coded...

Buffer for managing data samples in a read channel

Hardware architecture and implementation of low power layered multi...

Modified targeted symbol flipping for non-binary LDPC codes

Optimized scheme and architecture of hard drive queue design

Systems and methods for combined binary and non-binary data processing

Symbol flipping data processor

Systems and methods for defect scanning

Mixed domain FFT-based non-binary LDPC decoder

Data sequence detection in band-limited channels using two stream d...

Adaptive maximum a posteriori (MAP) detector in read channel

Data processing system with failure recovery

Multi-level LDPC layer decoder

Systems and methods for reduced power multi-layer data decoding

Symbol flipping LDPC decoding system

Power management for storage device read channel

Patents Applicationslast 30 patents

METHOD AND APPARATUS TO IMPROVE READ LATENCY OF A MULTI-THRESHOLD L...

PROACTIVE REDUCTION OF RE-READ TRIGGERING

SYNCHRONOUS RECTIFIER CONTROLLER FOR OFFLINE POWER CONVERTER AND ME...

TECHNIQUES TO A SET VOLTAGE LEVEL FOR A DATA ACCESS

SYNCHRONOUS RECTIFIER TURN-ON ENABLE

ADAPTIVE TURN-OFF TRIGGER BLANKING FOR SYNCHRONOUS RECTIFICATION

SEMICONDUCTOR DEVICE AND METHOD THEREFOR

SELF-TUNING ADAPTIVE DEAD TIME CONTROL FOR CONTINUOUS CONDUCTION MO...

ADAPTIVE TURN-OFF TRIGGER BLANKING FOR SYNCHRONOUS RECTIFICATION

System and Method for Utilizing History Information in a Memory Device

METABLOCK RELINKING SCHEME IN ADAPTIVE WEAR LEVELING

HIGH DISPLACEMENT ULTRASONIC TRANSDUCER

Buffer for Managing Data Samples in a Read Channel

Flexible Low Density Parity Check Code Seed

LEH Memory Module Architecture Design in the Multi-Level LDPC Coded...

Load Balanced Decoding of Low-Density Parity-Check Codes

Hardware Architecture and Implementation of Low Power Layered Multi...

ADAPTIVE MAXIMUM A POSTERIORI (MAP) DETECTOR IN READ CHANNEL

DATA RECOVERY USING NO SYNC MARK RETRY

MODIFIED TARGETED SYMBOL FLIPPING FOR NON-BINARY LDPC CODES

POWER MANAGEMENT FOR STORAGE DEVICE READ CHANNEL

OPTIMIZED SCHEME AND ARCHITECTURE OF HARD DRIVE QUEUE DESIGN

EFFICIENT MEMORY CONTENT ACCESS

Systems and Methods for Defect Scanning

Symbol Flipping LDPC Decoding System

Data Processing System with Failure Recovery

Multi-Section Non-Binary LDPC Decoder

Symbol Flipping Data Processor

Mixed Domain FFT-Based Non-Binary LDPC Decoder

Systems and Methods for Combined Binary and Non-Binary Data Processing