Leonardus C. M. G. Pfennings deceased

Person

late of Sittard, NL

People

Patents Grantslast 30 patents

Information Patent Grant
Pulse generator circuit arrangement
- Patent number 5,265,064
- Issue date Nov 23, 1993
- U.S. Philips Corp.
- Thomas J. Davies
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated circuit with temperature compensation
- Patent number 5,229,709
- Issue date Jul 20, 1993
- U.S. Philips Corp.
- Leonardus C. M. G. Pfennings
- G05 - CONTROLLING REGULATING
Information Patent Grant
Addressable memory unit having an improved unit selection circuit
- Patent number 5,224,071
- Issue date Jun 29, 1993
- U.S. Philips Corp.
- Cormac O'Connell
- G11 - INFORMATION STORAGE
Information Patent Grant
Stable, programmable low-dissipation reference circuit
- Patent number 5,212,413
- Issue date May 18, 1993
- U.S. Philips Corp.
- Cathal G. Phelan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated output buffer logic circuit with a memory circuit
- Patent number 5,087,840
- Issue date Feb 11, 1992
- U.S. Philips Corp.
- Thomas J. Davies
- G11 - INFORMATION STORAGE
Information Patent Grant
Fast static random access memory with high storage capacity
- Patent number 5,040,152
- Issue date Aug 13, 1991
- U.S. Philips Corp.
- Peter H. Voss
- G11 - INFORMATION STORAGE
Information Patent Grant
Matrix memory with redundancy and minimizes delay
- Patent number 5,033,024
- Issue date Jul 16, 1991
- U.S. Philips Corp.
- Cormac M. O'Connell
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit with on-chip voltage converter
- Patent number 4,978,867
- Issue date Dec 18, 1990
- U.S. Philips Corp.
- Leonardus C. M. G. Pfennings
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Static memory unit having a plurality of test modes, and computer e...
- Patent number 4,951,254
- Issue date Aug 21, 1990
- U.S. Philips Corporation
- Hans Ontrop
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit arrangement for a dual bus line
- Patent number 4,931,667
- Issue date Jun 5, 1990
- U.S. Philips Corporation
- Leonardus C. M. G. Pfennings
- G11 - INFORMATION STORAGE
Information Patent Grant
Push-pull output circuit having three transistors
- Patent number 4,929,911
- Issue date May 29, 1990
- U.S. Philips Corp.
- Thomas J. Davies
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Logic circuits with data resynchronization
- Patent number 4,918,331
- Issue date Apr 17, 1990
- U.S. Philips Corp.
- Adrianus T. Van Zanten
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Charge-coupled device with varible storage capacity and constant cl...
- Patent number 4,868,665
- Issue date Sep 19, 1989
- U.S. Philips Corp.
- Leonardus C. M. G. Pfennings
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated memory circuit having a block selection circuit
- Patent number 4,849,943
- Issue date Jul 18, 1989
- U.S. Philips Corp.
- Leonardus C. M. G. Pfennings
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated memory circuit having complementary bit line charging
- Patent number 4,823,319
- Issue date Apr 18, 1989
- U.S. Philips Corporation
- Leonardus C. M. G. Pfennings
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated electronic multiplex circuit
- Patent number 4,817,090
- Issue date Mar 28, 1989
- U.S. Philips Corporation
- Leonardus C. Pfennings
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Integrated circuit having capacitive process-scatter compensation
- Patent number 4,775,806
- Issue date Oct 4, 1988
- U.S. Philips Corporation
- Leonardus C. M. G. Pfennings
- G05 - CONTROLLING REGULATING
Information Patent Grant
Charge-coupled device with reduced signal distortion
- Patent number 4,727,560
- Issue date Feb 23, 1988
- U.S. Philips Corporation
- Adrianus T. Van Zanten
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit having reduced clock cross-talk
- Patent number 4,707,844
- Issue date Nov 17, 1987
- U.S. Philips Corporation
- Hendrikus J. M. Veendrick
- G11 - INFORMATION STORAGE
Information Patent Grant
Logic boatstrapping circuit having a feedforward kicker circuit
- Patent number 4,697,111
- Issue date Sep 29, 1987
- U.S. Philips Corporation
- Adrianus T. Van Zanten
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Digital integrated circuit comprising complementary field effect tr...
- Patent number 4,667,303
- Issue date May 19, 1987
- U.S. Philips Corporation
- Leonardus C. M. G. Pfennings
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Electronic device for the execution of a mathematical operation on...
- Patent number 4,513,388
- Issue date Apr 23, 1985
- U.S. Philips Corporation
- Hendrikus J. M. Veendrick
- G06 - COMPUTING CALCULATING COUNTING

Leonardus C. M. G. Pfennings deceased

Person

Patents Grantslast 30 patents

Pulse generator circuit arrangement

Integrated circuit with temperature compensation

Addressable memory unit having an improved unit selection circuit

Stable, programmable low-dissipation reference circuit

Integrated output buffer logic circuit with a memory circuit

Fast static random access memory with high storage capacity

Matrix memory with redundancy and minimizes delay

Integrated circuit with on-chip voltage converter

Static memory unit having a plurality of test modes, and computer e...

Circuit arrangement for a dual bus line

Push-pull output circuit having three transistors

Logic circuits with data resynchronization

Charge-coupled device with varible storage capacity and constant cl...

Integrated memory circuit having a block selection circuit

Integrated memory circuit having complementary bit line charging

Integrated electronic multiplex circuit

Integrated circuit having capacitive process-scatter compensation

Charge-coupled device with reduced signal distortion

Integrated circuit having reduced clock cross-talk

Logic boatstrapping circuit having a feedforward kicker circuit

Digital integrated circuit comprising complementary field effect tr...

Electronic device for the execution of a mathematical operation on...