Leonel R. ARANA

Person

Phoenix, AZ, US

People

Patents Grantslast 30 patents

Information Patent Grant
Selectively roughened copper architectures for low insertion loss c...
- Patent number 12,033,930
- Issue date Jul 9, 2024
- Intel Corporation
- Jieying Kong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Conductive route patterning for electronic substrates
- Patent number 12,027,466
- Issue date Jul 2, 2024
- Intel Corporation
- Jeremy D. Ecton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Subtractive etch resolution implementing a functional thin metal re...
- Patent number 11,948,848
- Issue date Apr 2, 2024
- Intel Corporation
- Jeremy Ecton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Conductive route patterning for electronic substrates
- Patent number 11,817,349
- Issue date Nov 14, 2023
- Intel Corporation
- Jeremy Ecton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Via structures having tapered profiles for embedded interconnect br...
- Patent number 11,721,631
- Issue date Aug 8, 2023
- Intel Corporation
- Jeremy D. Ecton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Prism-mask for angled patterning applications
- Patent number 11,506,982
- Issue date Nov 22, 2022
- Intel Corporation
- Vahidreza Parichehreh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Via structures having tapered profiles for embedded interconnect br...
- Patent number 11,373,951
- Issue date Jun 28, 2022
- Intel Corporation
- Jeremy D. Ecton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
First layer interconnect first on carrier approach for EMIB patch
- Patent number 11,088,103
- Issue date Aug 10, 2021
- Intel Corporation
- Changhua Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Enhanced etch anisotropy using nanoparticles as banking agents in t...
- Patent number 10,515,824
- Issue date Dec 24, 2019
- Intel Corporation
- Jeremy Ecton
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Non-destructive 3-dimensional chemical imaging of photo-resist mate...
- Patent number 10,078,204
- Issue date Sep 18, 2018
- Intel Corporation
- Nilanjan Z. Ghosh
- G02 - OPTICS
Information Patent Grant
Methods of fabricating low melting point solder reinforced sealant...
- Patent number 9,808,875
- Issue date Nov 7, 2017
- Intel Corporation
- Deepak V. Kulkarni
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Forming sacrificial composite materials for package-on-package arch...
- Patent number 9,793,233
- Issue date Oct 17, 2017
- Intel Corporation
- Rajasekaran Swaminathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Die warpage control for thin die assembly
- Patent number 9,659,899
- Issue date May 23, 2017
- Intel Corporation
- Sandeep B. Sane
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Forming sacrificial composite materials for package-on-package arch...
- Patent number 9,472,519
- Issue date Oct 18, 2016
- Intel Corporation
- Rajasekaran Swaminathan
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Methods of fabricating low melting point solder reinforced sealant...
- Patent number 9,254,532
- Issue date Feb 9, 2016
- Intel Corporation
- Deepak V. Kulkarni
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Die warpage control for thin die assembly
- Patent number 9,123,732
- Issue date Sep 1, 2015
- Intel Corporation
- Sandeep B. Sane
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Forming sacrificial composite materials for package-on-package arch...
- Patent number 9,006,887
- Issue date Apr 14, 2015
- Intel Corporation
- Rajasekaran Swaminathan
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Microelectronic package and method of manufacturing same
- Patent number 8,674,519
- Issue date Mar 18, 2014
- Intel Corporation
- Leonel R. Arana
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Thermally conductive device with a thermal interface material
- Patent number 8,592,972
- Issue date Nov 26, 2013
- Intel Corporation
- Lakshmi Supriya
- F28 - HEAT EXCHANGE IN GENERAL
Information Patent Grant
Coating for a microelectronic device, treatment comprising same, an...
- Patent number 8,569,108
- Issue date Oct 29, 2013
- Intel Corporation
- Dingying Xu
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Package-on-package interconnect stiffener
- Patent number 8,513,792
- Issue date Aug 20, 2013
- Intel Corporation
- Sanka Ganesan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of processing a thermal interface material
- Patent number 8,383,459
- Issue date Feb 26, 2013
- Intel Corporation
- Lakshmi Supriya
- F28 - HEAT EXCHANGE IN GENERAL
Information Patent Grant
Treatment for a microelectronic device and method of resisting dama...
- Patent number 8,304,065
- Issue date Nov 6, 2012
- Leonel Arana
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Coating for a microelectronic device, treatment comprising same, an...
- Patent number 8,287,996
- Issue date Oct 16, 2012
- Intel Corporation
- Dingying Xu
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Clipless integrated heat spreader process and materials
- Patent number 8,163,598
- Issue date Apr 24, 2012
- Intel Corporation
- George Kostiew
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Directing the flow of underfill materials using magnetic particles
- Patent number 8,009,442
- Issue date Aug 30, 2011
- Intel Corporation
- Stephen E. Lehman, Jr.
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Method of interconnecting workpieces
- Patent number 7,971,347
- Issue date Jul 5, 2011
- Intel Corporation
- Leonel Arana
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Clipless integrated heat spreader process and materials
- Patent number 7,892,883
- Issue date Feb 22, 2011
- Intel Corporation
- George Kostiew
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Through-die metal vias with a dispersed phase of graphitic structur...
- Patent number 7,666,768
- Issue date Feb 23, 2010
- Intel Corporation
- Nachiket R. Raravikar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Microelectronic package and method of cooling same
- Patent number 7,592,697
- Issue date Sep 22, 2009
- Intel Corporation
- Leonel R. Arana
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
METHODS AND APPARATUS TO REDUCE DELAMINATION IN HYBRID CORES
- Publication number 20240347402
- Publication date Oct 17, 2024
- Intel Corporation
- Jeremy Ecton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TOOLS AND METHODS FOR SURFACE LEVELING
- Publication number 20240282591
- Publication date Aug 22, 2024
- Intel Corporation
- Oladeji FADAYOMI
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
METHODS, SYSTEMS, APPARATUS, AND ARTICLES OF MANUFACTURE TO PRODUCE...
- Publication number 20240222259
- Publication date Jul 4, 2024
- Intel Corporation
- Haobo Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS AND APPARATUS TO PREVENT OVER-ETCH IN SEMICONDUCTOR PACKAGES
- Publication number 20240222283
- Publication date Jul 4, 2024
- Intel Corporation
- Hongxia Feng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GLASS LAYER WITH LITHO DEFINED THROUGH-GLASS VIA
- Publication number 20240203806
- Publication date Jun 20, 2024
- Intel Corporation
- Bohan Shan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DRY FILM PHOTORESIST WET LAMINATION AND METHOD
- Publication number 20240203853
- Publication date Jun 20, 2024
- Intel Corporation
- Bohan Shan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE WITH MULTI-LAYERED METALLIZATION LINES
- Publication number 20240006327
- Publication date Jan 4, 2024
- Intel Corporation
- Jeremy Ecton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
POSITION CONTROLLED WAVEGUIDES AND METHODS OF MANUFACTURING THE SAME
- Publication number 20230104330
- Publication date Apr 6, 2023
- Intel Corporation
- Jeremy Ecton
- G02 - OPTICS
Information Patent Application
METHODS AND APPARATUS TO REDUCE DEFECTS IN INTERCONNECTS BETWEEN S...
- Publication number 20230097624
- Publication date Mar 30, 2023
- Intel Corporation
- Kyle McElhinny
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS AND APPARATUS TO REDUCE DEFECTS IN INTERCONNECTS BETWEEN S...
- Publication number 20230096835
- Publication date Mar 30, 2023
- Intel Corporation
- Kyle McElhinny
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS AND APPARATUS TO REDUCE DEFECTS IN INTERCONNECTS BETWEEN SE...
- Publication number 20230095281
- Publication date Mar 30, 2023
- Intel Corporation
- Kyle McElhinny
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIE FIRST FAN-OUT ARCHITECTURE FOR ELECTRIC AND OPTICAL INTEGRATION
- Publication number 20230090133
- Publication date Mar 23, 2023
- Bai Nie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CORE PATCH WITH MATCHED PTH TO FLI PITCH FOR Z-DISAGGREGATION
- Publication number 20230085944
- Publication date Mar 23, 2023
- Intel Corporation
- Bai NIE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIE LAST AND WAVEGUIDE LAST ARCHITECTURE FOR SILICON PHOTONIC PACKA...
- Publication number 20230087124
- Publication date Mar 23, 2023
- Bai Nie
- G02 - OPTICS
Information Patent Application
LITHOGRAPHY PILLAR PROCESS FOR EMBEDDED BRIDGE SCALING
- Publication number 20230090350
- Publication date Mar 23, 2023
- Intel Corporation
- Kyle MCELHINNY
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EMBEDDED GLASS CORE PATCH
- Publication number 20230085646
- Publication date Mar 23, 2023
- Jeremy D Ecton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GLASS PATCH INTEGRATION INTO AN ELECTRONIC DEVICE PACKAGE
- Publication number 20230093258
- Publication date Mar 23, 2023
- Intel Corporation
- Jeremy D. ECTON
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FINE BUMP PITCH DIE TO DIE TILING INCORPORATING AN INVERTED GLASS I...
- Publication number 20230079607
- Publication date Mar 16, 2023
- Intel Corporation
- Jeremy D. ECTON
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATION OF GLASS CORE INTO ELECTRONIC SUBSTRATES FOR FINE PITCH...
- Publication number 20230077486
- Publication date Mar 16, 2023
- Intel Corporation
- Jeremy D. ECTON
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FIRST LAYER INTERCONNECT FIRST ON CARRIER APPROACH FOR EMIB PATCH
- Publication number 20230027030
- Publication date Jan 26, 2023
- Intel Corporation
- Changhua LIU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TECHNOLOGIES FOR ALIGNED VIAS
- Publication number 20220406654
- Publication date Dec 22, 2022
- Intel Corporation
- Changhua Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TECHNOLOGIES FOR ALIGNED VIAS OVER MULTIPLE LAYERS
- Publication number 20220406618
- Publication date Dec 22, 2022
- Intel Corporation
- Changhua Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EMBEDDED BRIDGE ARCHITECTURE WITH THINNED SURFACE
- Publication number 20220310518
- Publication date Sep 29, 2022
- Intel Corporation
- Haobo CHEN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VIA STRUCTURES HAVING TAPERED PROFILES FOR EMBEDDED INTERCONNECT BR...
- Publication number 20220285278
- Publication date Sep 8, 2022
- Intel Corporation
- Jeremy D. Ecton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELECTIVELY ROUGHENED COPPER ARCHITECTURES FOR LOW INSERTION LOSS C...
- Publication number 20220102259
- Publication date Mar 31, 2022
- Intel Corporation
- Jieying Kong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONDUCTIVE ROUTE PATTERNING FOR ELECTRONIC SUBSTRATES
- Publication number 20220093520
- Publication date Mar 24, 2022
- Intel Corporation
- Jeremy D. Ecton
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
AIRGAP STRUCTURES FOR HIGH SPEED SIGNAL INTEGRITY
- Publication number 20210375746
- Publication date Dec 2, 2021
- Intel Corporation
- Hongxia Feng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FIRST LAYER INTERCONNECT FIRST ON CARRIER APPROACH FOR EMIB PATCH
- Publication number 20210343673
- Publication date Nov 4, 2021
- Intel Corporation
- Changhua LIU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
COMPOSITE DRY FILM RESIST FOR PHOTOLITHOGRAPHY
- Publication number 20210318612
- Publication date Oct 14, 2021
- Intel Corporation
- Hongxia FENG
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
CONDUCTIVE ROUTE PATTERNING FOR ELECTRONIC SUBSTRATES
- Publication number 20210280463
- Publication date Sep 9, 2021
- Intel Corporation
- Jeremy Ecton
- H01 - BASIC ELECTRIC ELEMENTS

Leonel R. ARANA

Person

Patents Grantslast 30 patents

Selectively roughened copper architectures for low insertion loss c...

Conductive route patterning for electronic substrates

Subtractive etch resolution implementing a functional thin metal re...

Conductive route patterning for electronic substrates

Via structures having tapered profiles for embedded interconnect br...

Prism-mask for angled patterning applications

Via structures having tapered profiles for embedded interconnect br...

First layer interconnect first on carrier approach for EMIB patch

Enhanced etch anisotropy using nanoparticles as banking agents in t...

Non-destructive 3-dimensional chemical imaging of photo-resist mate...

Methods of fabricating low melting point solder reinforced sealant...

Forming sacrificial composite materials for package-on-package arch...

Die warpage control for thin die assembly

Forming sacrificial composite materials for package-on-package arch...

Methods of fabricating low melting point solder reinforced sealant...

Die warpage control for thin die assembly

Forming sacrificial composite materials for package-on-package arch...

Microelectronic package and method of manufacturing same

Thermally conductive device with a thermal interface material

Coating for a microelectronic device, treatment comprising same, an...

Package-on-package interconnect stiffener

Methods of processing a thermal interface material

Treatment for a microelectronic device and method of resisting dama...

Coating for a microelectronic device, treatment comprising same, an...

Clipless integrated heat spreader process and materials

Directing the flow of underfill materials using magnetic particles

Method of interconnecting workpieces

Clipless integrated heat spreader process and materials

Through-die metal vias with a dispersed phase of graphitic structur...

Microelectronic package and method of cooling same

Patents Applicationslast 30 patents

METHODS AND APPARATUS TO REDUCE DELAMINATION IN HYBRID CORES

TOOLS AND METHODS FOR SURFACE LEVELING

METHODS, SYSTEMS, APPARATUS, AND ARTICLES OF MANUFACTURE TO PRODUCE...

METHODS AND APPARATUS TO PREVENT OVER-ETCH IN SEMICONDUCTOR PACKAGES

GLASS LAYER WITH LITHO DEFINED THROUGH-GLASS VIA

DRY FILM PHOTORESIST WET LAMINATION AND METHOD

INTEGRATED CIRCUIT PACKAGE WITH MULTI-LAYERED METALLIZATION LINES

POSITION CONTROLLED WAVEGUIDES AND METHODS OF MANUFACTURING THE SAME

METHODS AND APPARATUS TO REDUCE DEFECTS IN INTERCONNECTS BETWEEN S...

METHODS AND APPARATUS TO REDUCE DEFECTS IN INTERCONNECTS BETWEEN S...

METHODS AND APPARATUS TO REDUCE DEFECTS IN INTERCONNECTS BETWEEN SE...

DIE FIRST FAN-OUT ARCHITECTURE FOR ELECTRIC AND OPTICAL INTEGRATION

CORE PATCH WITH MATCHED PTH TO FLI PITCH FOR Z-DISAGGREGATION

DIE LAST AND WAVEGUIDE LAST ARCHITECTURE FOR SILICON PHOTONIC PACKA...

LITHOGRAPHY PILLAR PROCESS FOR EMBEDDED BRIDGE SCALING

EMBEDDED GLASS CORE PATCH

GLASS PATCH INTEGRATION INTO AN ELECTRONIC DEVICE PACKAGE

FINE BUMP PITCH DIE TO DIE TILING INCORPORATING AN INVERTED GLASS I...

INTEGRATION OF GLASS CORE INTO ELECTRONIC SUBSTRATES FOR FINE PITCH...

FIRST LAYER INTERCONNECT FIRST ON CARRIER APPROACH FOR EMIB PATCH

TECHNOLOGIES FOR ALIGNED VIAS

TECHNOLOGIES FOR ALIGNED VIAS OVER MULTIPLE LAYERS

EMBEDDED BRIDGE ARCHITECTURE WITH THINNED SURFACE

VIA STRUCTURES HAVING TAPERED PROFILES FOR EMBEDDED INTERCONNECT BR...

SELECTIVELY ROUGHENED COPPER ARCHITECTURES FOR LOW INSERTION LOSS C...

CONDUCTIVE ROUTE PATTERNING FOR ELECTRONIC SUBSTRATES

AIRGAP STRUCTURES FOR HIGH SPEED SIGNAL INTEGRITY

FIRST LAYER INTERCONNECT FIRST ON CARRIER APPROACH FOR EMIB PATCH

COMPOSITE DRY FILM RESIST FOR PHOTOLITHOGRAPHY

CONDUCTIVE ROUTE PATTERNING FOR ELECTRONIC SUBSTRATES