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Lidia Daldoss
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San Jose, CA, US
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Patents Grants
last 30 patents
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Patent Grant
Method for reducing layout printability effects on semiconductor de...
Patent number
7,644,388
Issue date
Jan 5, 2010
PDF Solutions, Inc.
Lidia Daldoss
H01 - BASIC ELECTRIC ELEMENTS
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Patent Grant
Methodology for the optimization of testing and diagnosis of analog...
Patent number
7,003,742
Issue date
Feb 21, 2006
PDF Solutions, Inc.
Sharad Saxena
G06 - COMPUTING CALCULATING COUNTING
Patents Applications
last 30 patents
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Patent Application
Methodology for the optimization of testing and diagnosis of analog...
Publication number
20040015793
Publication date
Jan 22, 2004
Sharad Saxena
G06 - COMPUTING CALCULATING COUNTING