Liji Gopalakrishnan

Person

Sunnyvale, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Hierarchical bank group timing
- Patent number 12,230,355
- Issue date Feb 18, 2025
- RAMBUS INC.
- John Eric Linstadt
- G11 - INFORMATION STORAGE
Information Patent Grant
Flash memory device having a calibration mode
- Patent number 12,072,817
- Issue date Aug 27, 2024
- RAMBUS INC.
- Pravin Kumar Venkatesan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Energy-efficient error-correction-detection storage
- Patent number 12,050,513
- Issue date Jul 30, 2024
- RAMBUS INC.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Load-reduced DRAM stack
- Patent number 11,972,121
- Issue date Apr 30, 2024
- RAMBUS INC.
- Thomas Vogelsang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Command-triggered data clock distribution mode
- Patent number 11,955,161
- Issue date Apr 9, 2024
- RAMBUS INC.
- Ian Shaeffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dedicated cache-related block transfer in a memory system
- Patent number 11,921,650
- Issue date Mar 5, 2024
- RAMBUS INC.
- Liji Gopalakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Partial array refresh timing
- Patent number 11,868,619
- Issue date Jan 9, 2024
- RAMBUS INC.
- Liji Gopalakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory system with multiple open rows per bank
- Patent number 11,842,761
- Issue date Dec 12, 2023
- RAMBUS INC.
- Thomas Vogelsang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flash memory device having a calibration mode
- Patent number 11,829,308
- Issue date Nov 28, 2023
- RAMBUS INC.
- Pravin Kumar Venkatesan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
DRAM interface mode with interruptible internal transfer operation
- Patent number 11,829,307
- Issue date Nov 28, 2023
- RAMBUS INC.
- Liji Gopalakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Calibration protocol for command and address bus voltage reference...
- Patent number 11,803,489
- Issue date Oct 31, 2023
- RAMBUS INC.
- Pravin Kumar Venkatesan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory module with configurable command buffer
- Patent number 11,782,863
- Issue date Oct 10, 2023
- RAMBUS INC.
- Liji Gopalakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flash memory device having a calibration mode
- Patent number 11,734,208
- Issue date Aug 22, 2023
- RAMBUS INC.
- Pravin Kumar Venkatesan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Energy-efficient error-correction-detection storage
- Patent number 11,675,657
- Issue date Jun 13, 2023
- RAMBUS INC.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dedicated cache-related block transfer in a memory system
- Patent number 11,599,483
- Issue date Mar 7, 2023
- RAMBUS INC.
- Liji Gopalakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Command-triggered data clock distribution
- Patent number 11,587,605
- Issue date Feb 21, 2023
- RAMBUS INC.
- Ian Shaeffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Securing address information in a memory controller
- Patent number 11,526,632
- Issue date Dec 13, 2022
- RAMBUS INC.
- Craig E. Hampel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Calibration protocol for command and address bus voltage reference...
- Patent number 11,372,784
- Issue date Jun 28, 2022
- RAMBUS INC.
- Pravin Kumar Venkatesan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory with alternative command interfaces
- Patent number 11,372,795
- Issue date Jun 28, 2022
- RAMBUS INC.
- Liji Gopalakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Energy-efficient error-correction-detection storage
- Patent number 11,327,831
- Issue date May 10, 2022
- RAMBUS INC.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dedicated cache-related block transfer in a memory system
- Patent number 11,232,047
- Issue date Jan 25, 2022
- RAMBUS INC.
- Liji Gopalakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
DRAM interface mode with interruptible internal transfer operation
- Patent number 11,226,909
- Issue date Jan 18, 2022
- RAMBUS INC.
- Liji Gopalakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory system with multiple open rows per bank
- Patent number 11,114,150
- Issue date Sep 7, 2021
- RAMBUS INC.
- Thomas Vogelsang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory component with command-triggered data clock distribution
- Patent number 11,049,546
- Issue date Jun 29, 2021
- RAMBUS INC.
- Ian Shaeffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory with alternative command interfaces
- Patent number 10,747,703
- Issue date Aug 18, 2020
- RAMBUS INC.
- Liji Gopalakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory component with independently enabled data and command interf...
- Patent number 10,665,289
- Issue date May 26, 2020
- Rambus Inc.
- Ian Shaeffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Energy-efficient error-correction-detection storage
- Patent number 10,613,924
- Issue date Apr 7, 2020
- Rambus Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Calibration protocol for command and address bus voltage reference...
- Patent number 10,509,741
- Issue date Dec 17, 2019
- Rambus Inc.
- Pravin Kumar Venkatesan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory with alternative command interfaces
- Patent number 10,380,056
- Issue date Aug 13, 2019
- Rambus Inc.
- Liji Gopalakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Communication via a memory interface
- Patent number 10,209,922
- Issue date Feb 19, 2019
- Rambus Inc.
- Liji Gopalakrishnan
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
FLASH MEMORY DEVICE HAVING A CALIBRATION MODE
- Publication number 20250036581
- Publication date Jan 30, 2025
- Rambus Inc.
- Pravin Kumar Venkatesan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Energy-Efficient Error-Correction-Detection Storage
- Publication number 20240411640
- Publication date Dec 12, 2024
- Rambus Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOAD-REDUCED DRAM STACK
- Publication number 20240302977
- Publication date Sep 12, 2024
- Rambus Inc.
- Thomas Vogelsang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY COMPONENT WITH STAGGERED POWER-DOWN EXIT
- Publication number 20240282357
- Publication date Aug 22, 2024
- Rambus Inc.
- Ian Shaeffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARTIAL ARRAY REFRESH TIMING
- Publication number 20240176497
- Publication date May 30, 2024
- Rambus Inc.
- Liji GOPALAKRISHNAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DRAM INTERFACE MODE WITH INTERRUPTIBLE INTERNAL TRANSFER OPERATION
- Publication number 20240152470
- Publication date May 9, 2024
- Rambus Inc.
- Liji Gopalakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM WITH MULTIPLE OPEN ROWS PER BANK
- Publication number 20240127882
- Publication date Apr 18, 2024
- Rambus Inc.
- Thomas VOGELSANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLASH MEMORY DEVICE HAVING A CALIBRATION MODE
- Publication number 20230418770
- Publication date Dec 28, 2023
- Rambus Inc.
- Pravin Kumar Venkatesan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY COMPONENT WITH STAGGERED POWER-DOWN EXIT
- Publication number 20230326513
- Publication date Oct 12, 2023
- Rambus Inc.
- Ian Shaeffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Energy-Efficient Error-Correction-Detection Storage
- Publication number 20230315563
- Publication date Oct 5, 2023
- Rambus Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DEDICATED CACHE-RELATED BLOCK TRANSFER IN A MEMORY SYSTEM
- Publication number 20230281137
- Publication date Sep 7, 2023
- Rambus Inc.
- Liji Gopalakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Stacked-Die Neural Network with Integrated High-Bandwidth Memory
- Publication number 20230153587
- Publication date May 18, 2023
- Rambus Inc.
- Thomas Vogelsang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLASH MEMORY DEVICE HAVING A CALIBRATION MODE
- Publication number 20230119579
- Publication date Apr 20, 2023
- Rambus Inc.
- Pravin Kumar Venkatesan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOAD-REDUCED DRAM STACK
- Publication number 20230072674
- Publication date Mar 9, 2023
- Rambus Inc.
- Thomas Vogelsang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CALIBRATION PROTOCOL FOR COMMAND AND ADDRESS BUS VOLTAGE REFERENCE...
- Publication number 20230052053
- Publication date Feb 16, 2023
- Rambus Inc.
- Pravin Kumar Venkatesan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARTIAL ARRAY REFRESH TIMING
- Publication number 20230026876
- Publication date Jan 26, 2023
- Rambus Inc.
- Liji GOPALAKRISHNAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY WITH ALTERNATIVE COMMAND INTERFACES
- Publication number 20220374381
- Publication date Nov 24, 2022
- Rambus Inc.
- Liji Gopalakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIERARCHICAL BANK GROUP TIMING
- Publication number 20220328078
- Publication date Oct 13, 2022
- Rambus Inc.
- John Eric LINSTADT
- G11 - INFORMATION STORAGE
Information Patent Application
Energy-Efficient Error-Correction-Detection Storage
- Publication number 20220291992
- Publication date Sep 15, 2022
- Rambus Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DRAM INTERFACE MODE WITH INTERRUPTIBLE INTERNAL TRANSFER OPERATION
- Publication number 20220261361
- Publication date Aug 18, 2022
- Rambus Inc.
- Liji Gopalakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DEDICATED CACHE-RELATED BLOCK TRANSFER IN A MEMORY SYSTEM
- Publication number 20220214979
- Publication date Jul 7, 2022
- Rambus Inc.
- Liji Gopalakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM WITH MULTIPLE OPEN ROWS PER BANK
- Publication number 20220013161
- Publication date Jan 13, 2022
- Rambus Inc.
- Thomas VOGELSANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY COMPONENT WITH STAGGERED POWER-DOWN EXIT
- Publication number 20210358535
- Publication date Nov 18, 2021
- Rambus Inc.
- Ian Shaeffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SECURING ADDRESS INFORMATION IN A MEMORY CONTROLLER
- Publication number 20210064788
- Publication date Mar 4, 2021
- Rambus Inc.
- Craig E. Hampel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY WITH ALTERNATIVE COMMAND INTERFACES
- Publication number 20210011876
- Publication date Jan 14, 2021
- Rambus Inc.
- Liji Gopalakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EXTERNAL BLOCK TRANSFER IN A MEMORY SYSTEM
- Publication number 20200379926
- Publication date Dec 3, 2020
- RAMBUS INC.
- Liji Gopalakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY COMPONENT WITH STAGGERED POWER-DOWN EXIT
- Publication number 20200349997
- Publication date Nov 5, 2020
- RAMBUS INC.
- Ian Shaeffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM WITH MULTIPLE OPEN ROWS PER BANK
- Publication number 20200335150
- Publication date Oct 22, 2020
- RAMBUS INC.
- Thomas VOGELSANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Energy-Efficient Error-Correction-Detection Storage
- Publication number 20200278902
- Publication date Sep 3, 2020
- RAMBUS INC.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CALIBRATION PROTOCOL FOR COMMAND AND ADDRESS BUS VOLTAGE REFERENCE...
- Publication number 20200218675
- Publication date Jul 9, 2020
- RAMBUS INC.
- Pravin Kumar Venkatesan
- G06 - COMPUTING CALCULATING COUNTING

Liji Gopalakrishnan

Person

Patents Grantslast 30 patents

Hierarchical bank group timing

Flash memory device having a calibration mode

Energy-efficient error-correction-detection storage

Load-reduced DRAM stack

Command-triggered data clock distribution mode

Dedicated cache-related block transfer in a memory system

Partial array refresh timing

Memory system with multiple open rows per bank

Flash memory device having a calibration mode

DRAM interface mode with interruptible internal transfer operation

Calibration protocol for command and address bus voltage reference...

Memory module with configurable command buffer

Flash memory device having a calibration mode

Energy-efficient error-correction-detection storage

Dedicated cache-related block transfer in a memory system

Command-triggered data clock distribution

Securing address information in a memory controller

Calibration protocol for command and address bus voltage reference...

Memory with alternative command interfaces

Energy-efficient error-correction-detection storage

Dedicated cache-related block transfer in a memory system

DRAM interface mode with interruptible internal transfer operation

Memory system with multiple open rows per bank

Memory component with command-triggered data clock distribution

Memory with alternative command interfaces

Memory component with independently enabled data and command interf...

Energy-efficient error-correction-detection storage

Calibration protocol for command and address bus voltage reference...

Memory with alternative command interfaces

Communication via a memory interface

Patents Applicationslast 30 patents

FLASH MEMORY DEVICE HAVING A CALIBRATION MODE

Energy-Efficient Error-Correction-Detection Storage

LOAD-REDUCED DRAM STACK

MEMORY COMPONENT WITH STAGGERED POWER-DOWN EXIT

PARTIAL ARRAY REFRESH TIMING

DRAM INTERFACE MODE WITH INTERRUPTIBLE INTERNAL TRANSFER OPERATION

MEMORY SYSTEM WITH MULTIPLE OPEN ROWS PER BANK

FLASH MEMORY DEVICE HAVING A CALIBRATION MODE

MEMORY COMPONENT WITH STAGGERED POWER-DOWN EXIT

Energy-Efficient Error-Correction-Detection Storage

DEDICATED CACHE-RELATED BLOCK TRANSFER IN A MEMORY SYSTEM

Stacked-Die Neural Network with Integrated High-Bandwidth Memory

FLASH MEMORY DEVICE HAVING A CALIBRATION MODE

LOAD-REDUCED DRAM STACK

CALIBRATION PROTOCOL FOR COMMAND AND ADDRESS BUS VOLTAGE REFERENCE...

PARTIAL ARRAY REFRESH TIMING

MEMORY WITH ALTERNATIVE COMMAND INTERFACES

HIERARCHICAL BANK GROUP TIMING

Energy-Efficient Error-Correction-Detection Storage

DRAM INTERFACE MODE WITH INTERRUPTIBLE INTERNAL TRANSFER OPERATION

DEDICATED CACHE-RELATED BLOCK TRANSFER IN A MEMORY SYSTEM

MEMORY SYSTEM WITH MULTIPLE OPEN ROWS PER BANK

MEMORY COMPONENT WITH STAGGERED POWER-DOWN EXIT

SECURING ADDRESS INFORMATION IN A MEMORY CONTROLLER

MEMORY WITH ALTERNATIVE COMMAND INTERFACES

EXTERNAL BLOCK TRANSFER IN A MEMORY SYSTEM

MEMORY COMPONENT WITH STAGGERED POWER-DOWN EXIT

MEMORY SYSTEM WITH MULTIPLE OPEN ROWS PER BANK

Energy-Efficient Error-Correction-Detection Storage

CALIBRATION PROTOCOL FOR COMMAND AND ADDRESS BUS VOLTAGE REFERENCE...