LOUIS C. PARRILLO

Person

AUSTIN, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Vertical cross-point memory arrays
- Patent number 10,529,778
- Issue date Jan 7, 2020
- Unity Semiconductor Corporation
- Lidia Vereen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Systems and methods for a frame hanging device
- Patent number 10,448,763
- Issue date Oct 22, 2019
- Louis C. Parrillo
- G01 - MEASURING TESTING
Information Patent Grant
Vertical cross-point memory arrays
- Patent number 10,050,086
- Issue date Aug 14, 2018
- Unity Semiconductor Corporation
- Lidia Vereen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Systems and methods for a frame hanging device
- Patent number 9,549,624
- Issue date Jan 24, 2017
- Louis C. Parrillo
- A47 - FURNITURE DOMESTIC ARTICLES OR APPLIANCES COFFEE MILLS SPICE MILLS SUCT...
Information Patent Grant
Vertical cross-point memory arrays
- Patent number 9,419,217
- Issue date Aug 16, 2016
- Unity Semiconductor Corporation
- Lidia Vereen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Planar resistive memory integration
- Patent number 9,029,827
- Issue date May 12, 2015
- Unity Semiconductor Corporation
- Lidia Vereen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Planar resistive memory integration
- Patent number 8,610,099
- Issue date Dec 17, 2013
- Unity Semiconductor Corporation
- Lidia Vereen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for fabricating a semiconductor device having an improved m...
- Patent number 5,527,739
- Issue date Jun 18, 1996
- Motorola, Inc.
- Louis C. Parrillo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wireless motor vehicle diagnostic and software upgrade system
- Patent number 5,442,553
- Issue date Aug 15, 1995
- Motorola
- Louis C. Parrillo
- B60 - VEHICLES IN GENERAL
Information Patent Grant
Semiconductor device having an improved metal interconnect structure
- Patent number 5,442,235
- Issue date Aug 15, 1995
- Motorola Inc.
- Louis C. Parrillo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device having punch-through protected buried contacts...
- Patent number 5,208,168
- Issue date May 4, 1993
- Motorola, Inc.
- Louis C. Parrillo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Hot electron collector for a LDD transistor
- Patent number 4,951,100
- Issue date Aug 21, 1990
- Motorola, Inc.
- Louis C. Parrillo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High/low doping profile for twin well process
- Patent number 4,929,565
- Issue date May 29, 1990
- Motorola, Inc.
- Louis C. Parrillo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High/low doping profile for twin well process
- Patent number 4,889,825
- Issue date Dec 26, 1989
- Motorola, Inc.
- Louis C. Parrillo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Micron and submicron patterning without using a lithographic mask h...
- Patent number 4,812,418
- Issue date Mar 14, 1989
- Motorola, Inc.
- James R. Pfiester
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Well Extensions for trench devices
- Patent number 4,808,543
- Issue date Feb 28, 1989
- Motorola, Inc.
- Louis C. Parrillo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multiple step formation of conductive material layers
- Patent number 4,808,555
- Issue date Feb 28, 1989
- Motorola, Inc.
- Richard W. Mauntel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Double-implant process for forming graded source/drain regions
- Patent number 4,801,555
- Issue date Jan 31, 1989
- Motorola, Inc.
- Patrick J. Holly
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Illuminated paper cutter
- Patent number 4,769,747
- Issue date Sep 6, 1988
- Applied Ingenuity, Inc.
- Louis C. Parrillo
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
LDD CMOS process
- Patent number 4,753,898
- Issue date Jun 28, 1988
- Motorola, Inc.
- Louis C. Parrillo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Removable sidewall spacer for lightly doped drain formation using o...
- Patent number 4,745,086
- Issue date May 17, 1988
- Motorola, Inc.
- Louis C. Parrillo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Removable sidewall spacer for lightly doped drain formation using t...
- Patent number 4,722,909
- Issue date Feb 2, 1988
- Motorola, Inc.
- Louis C. Parrillo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
CMOS process
- Patent number 4,717,683
- Issue date Jan 5, 1988
- Motorola Inc.
- Louis C. Parrillo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit trench cell
- Patent number 4,686,552
- Issue date Aug 11, 1987
- Motorola, Inc.
- Ker-Wen Teng
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
VERTICAL CROSS-POINT MEMORY ARRAYS
- Publication number 20200258940
- Publication date Aug 13, 2020
- UNITY SEMICONDUCTOR CORPORATION
- Lidia Vereen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VERTICAL CROSS-POINT MEMORY ARRAYS
- Publication number 20190051701
- Publication date Feb 14, 2019
- UNITY SEMICONDUCTOR CORPORATION
- Lidia Vereen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SYSTEMS AND METHODS FOR A FRAME HANGING DEVICE
- Publication number 20170095094
- Publication date Apr 6, 2017
- LOUIS C. PARRILLO
- A47 - FURNITURE DOMESTIC ARTICLES OR APPLIANCES COFFEE MILLS SPICE MILLS SUCT...
Information Patent Application
VERTICAL CROSS-POINT MEMORY ARRAYS
- Publication number 20170033158
- Publication date Feb 2, 2017
- UNITY SEMICONDUCTOR CORPORATION
- Lidia Vereen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SYSTEMS AND METHODS FOR A FRAME HANGING DEVICE
- Publication number 20160081496
- Publication date Mar 24, 2016
- LOUIS C. PARRILLO
- A47 - FURNITURE DOMESTIC ARTICLES OR APPLIANCES COFFEE MILLS SPICE MILLS SUCT...
Information Patent Application
PLANAR RESISTIVE MEMORY INTEGRATION
- Publication number 20130207066
- Publication date Aug 15, 2013
- UNITY SEMICONDUCTOR CORPORATION
- Lidia Vereen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Vertical Cross-Point Memory Arrays
- Publication number 20130210211
- Publication date Aug 15, 2013
- Lidia Vereen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Memory Device Using Multiple Tunnel Oxide Layers
- Publication number 20130082228
- Publication date Apr 4, 2013
- UNITY SEMICONDUCTOR CORPORATION
- LOUIS PARRILLO
- H01 - BASIC ELECTRIC ELEMENTS

LOUIS C. PARRILLO

Person

Patents Grantslast 30 patents

Vertical cross-point memory arrays

Systems and methods for a frame hanging device

Vertical cross-point memory arrays

Systems and methods for a frame hanging device

Vertical cross-point memory arrays

Planar resistive memory integration

Planar resistive memory integration

Process for fabricating a semiconductor device having an improved m...

Wireless motor vehicle diagnostic and software upgrade system

Semiconductor device having an improved metal interconnect structure

Semiconductor device having punch-through protected buried contacts...

Hot electron collector for a LDD transistor

High/low doping profile for twin well process

High/low doping profile for twin well process

Micron and submicron patterning without using a lithographic mask h...

Well Extensions for trench devices

Multiple step formation of conductive material layers

Double-implant process for forming graded source/drain regions

Illuminated paper cutter

LDD CMOS process

Removable sidewall spacer for lightly doped drain formation using o...

Removable sidewall spacer for lightly doped drain formation using t...

CMOS process

Integrated circuit trench cell

Patents Applicationslast 30 patents

VERTICAL CROSS-POINT MEMORY ARRAYS

VERTICAL CROSS-POINT MEMORY ARRAYS

SYSTEMS AND METHODS FOR A FRAME HANGING DEVICE

VERTICAL CROSS-POINT MEMORY ARRAYS

SYSTEMS AND METHODS FOR A FRAME HANGING DEVICE

PLANAR RESISTIVE MEMORY INTEGRATION

Vertical Cross-Point Memory Arrays

Memory Device Using Multiple Tunnel Oxide Layers