Luca Crippa

Person

Busnago (MI), IT

People

Patents Grantslast 30 patents

Information Patent Grant
System and method for higher quality log likelihood ratios in LDPC...
- Patent number 9,590,656
- Issue date Mar 7, 2017
- Microsemi Storage Solutions (U.S.), Inc.
- Rino Micheloni
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
System and method for accumulating soft information in LDPC decoding
- Patent number 9,454,414
- Issue date Sep 27, 2016
- Microsemi Storage Solutions (U.S.), Inc.
- Rino Micheloni
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
System and method for memory block pool wear leveling
- Patent number 9,417,804
- Issue date Aug 16, 2016
- Microsemi Storage Solutions (U.S.), Inc.
- Rino Micheloni
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Nonvolatile memory system that uses programming time to reduce bit...
- Patent number 9,305,661
- Issue date Apr 5, 2016
- Microsemi Storage Solutions (U.S.), Inc.
- Rino Micheloni
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of programming a multi-level memory device
- Patent number 8,971,112
- Issue date Mar 3, 2015
- Micron Technology, Inc.
- Luca Crippa
- G11 - INFORMATION STORAGE
Information Patent Grant
Error correction code technique for improving read stress endurance
- Patent number 8,694,855
- Issue date Apr 8, 2014
- PMC-Sierra US, Inc.
- Rino Micheloni
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of programming a multi-level memory device
- Patent number 8,553,462
- Issue date Oct 8, 2013
- Micron Technology, Inc.
- Luca Crippa
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit and method for retrieving data stored in semiconductor memo...
- Patent number 7,889,586
- Issue date Feb 15, 2011
- Luca Crippa
- G11 - INFORMATION STORAGE
Information Patent Grant
Multistage regulator for charge-pump boosted voltage applications
- Patent number 7,863,967
- Issue date Jan 4, 2011
- Luca Crippa
- G11 - INFORMATION STORAGE
Information Patent Grant
Voltage regulator or non-volatile memories implemented with low-vol...
- Patent number 7,777,466
- Issue date Aug 17, 2010
- Luca Crippa
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of programming cells of a NAND memory device
- Patent number 7,719,894
- Issue date May 18, 2010
- Luca Crippa
- G11 - INFORMATION STORAGE
Information Patent Grant
Page buffer for multi-level NAND electrically-programmable semicond...
- Patent number 7,630,238
- Issue date Dec 8, 2009
- Luca Crippa
- G11 - INFORMATION STORAGE
Information Patent Grant
Charge-pump type, voltage-boosting device with reduced ripple, in p...
- Patent number 7,532,061
- Issue date May 12, 2009
- Giancarlo Ragone
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for compacting the erased threshold voltage distribution of...
- Patent number 7,529,136
- Issue date May 5, 2009
- Rino Micheloni
- G11 - INFORMATION STORAGE
Information Patent Grant
High-voltage switch with low output ripple for non-volatile floatin...
- Patent number 7,521,983
- Issue date Apr 21, 2009
- Giancarlo Ragone
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit and method for electrically programming a non-volatile semi...
- Patent number 7,499,332
- Issue date Mar 3, 2009
- Luca Crippa
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory implemented with low-voltages transistors and r...
- Patent number 7,499,345
- Issue date Mar 3, 2009
- Giovanni Campardo
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Circuit and method for retrieving data stored in semiconductor memo...
- Patent number 7,474,577
- Issue date Jan 6, 2009
- Luca Crippa
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device with a page buffer having an improved l...
- Patent number 7,408,819
- Issue date Aug 5, 2008
- STMicroelectronics S.r.l.
- Luca Crippa
- G11 - INFORMATION STORAGE
Information Patent Grant
Double page programming system and method
- Patent number 7,366,014
- Issue date Apr 29, 2008
- STMicroelectronics S.r.l.
- Rino Micheloni
- G11 - INFORMATION STORAGE
Information Patent Grant
Reading method of a NAND-type memory device and NAND-type memory de...
- Patent number 7,349,265
- Issue date Mar 25, 2008
- STMicroelectronics S.r.l.
- Luca Crippa
- G11 - INFORMATION STORAGE
Information Patent Grant
Page buffer circuit and method for multi-level NAND programmable me...
- Patent number 7,336,538
- Issue date Feb 26, 2008
- STMicroelectronics S.r.l.
- Luca Crippa
- G11 - INFORMATION STORAGE
Information Patent Grant
Data bus architecture for a semiconductor memory
- Patent number 7,260,005
- Issue date Aug 21, 2007
- STMicroelectronics S.r.l.
- Luca Crippa
- G11 - INFORMATION STORAGE
Information Patent Grant
Trimming functional parameters in integrated circuits
- Patent number 7,221,212
- Issue date May 22, 2007
- STMicroelectronics S.r.l.
- Luca Crippa
- G11 - INFORMATION STORAGE
Information Patent Grant
Sensing circuit for a semiconductor memory
- Patent number 7,184,348
- Issue date Feb 27, 2007
- STMicroelectronics S.r.l.
- Luca Crippa
- G11 - INFORMATION STORAGE
Information Patent Grant
Stabilization method for drain voltage in non-volatile multi-level...
- Patent number 7,031,191
- Issue date Apr 18, 2006
- STMicroelectronics S.r.l.
- Luca Crippa
- G11 - INFORMATION STORAGE
Information Patent Grant
Bandgap voltage reference circuit
- Patent number 6,642,776
- Issue date Nov 4, 2003
- STMicroelectronics S.r.l.
- Rino Micheloni
- G05 - CONTROLLING REGULATING
Information Patent Grant
Circuit and method for timing multi-level non-volatile memories
- Patent number 6,574,146
- Issue date Jun 3, 2003
- STMicroelectronics S.r.l.
- Rino Micheloni
- G11 - INFORMATION STORAGE
Information Patent Grant
Read circuit for a nonvolatile memory
- Patent number 6,327,184
- Issue date Dec 4, 2001
- STMicroelectronics S.r.l.
- Rino Micheloni
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
NONVOLATILE MEMORY SYSTEM THAT USES PROGRAMMING TIME TO REDUCE BIT...
- Publication number 20160064096
- Publication date Mar 3, 2016
- PMC-SIERRA US, INC.
- Rino Micheloni
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEM AND METHOD FOR MEMORY BLOCK POOL WEAR LEVELING
- Publication number 20160004458
- Publication date Jan 7, 2016
- PMC-SIERRA US, INC.
- Rino Micheloni
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR HIGHER QUALITY LOG LIKELIHOOD RATIOS IN LDPC...
- Publication number 20140281800
- Publication date Sep 18, 2014
- PMC-SIERRA US, INC.
- Rino Micheloni
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR ACCUMULATING SOFT INFORMATION IN LDPC DECODING
- Publication number 20140281828
- Publication date Sep 18, 2014
- PMC-SIERRA US, INC.
- Rino Micheloni
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD OF PROGRAMMING A MULTI-LEVEL MEMORY DEVICE
- Publication number 20140036588
- Publication date Feb 6, 2014
- Micron Technology, Inc.
- Luca Crippa
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD OF PROGRAMMING A MULTI-LEVEL MEMORY DEVICE
- Publication number 20090316482
- Publication date Dec 24, 2009
- Luca Crippa
- G11 - INFORMATION STORAGE
Information Patent Application
CIRCUIT AND METHOD FOR RETRIEVING DATA STORED IN SEMICONDUCTOR MEMO...
- Publication number 20090262593
- Publication date Oct 22, 2009
- Luca Crippa
- G11 - INFORMATION STORAGE
Information Patent Application
Page buffer for multi-level NAND electrically-programmable semicond...
- Publication number 20080123411
- Publication date May 29, 2008
- STMicroelectronics S.r.l.
- Luca Crippa
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD OF FIXING A READ EVALUATION TIME OR THE DIFFERENCE BETWEEN A...
- Publication number 20080062767
- Publication date Mar 13, 2008
- STMicroelectronics S.r.l.
- Luca CRIPPA
- G11 - INFORMATION STORAGE
Information Patent Application
VOLTAGE REGULATOR OR NON-VOLATILE MEMORIES IMPLEMENTED WITH LOW-VOL...
- Publication number 20080054864
- Publication date Mar 6, 2008
- STMicroelectronics S.r.l.
- Luca Crippa
- G05 - CONTROLLING REGULATING
Information Patent Application
METHOD OF PROGRAMMING CELLS OF A NAND MEMORY DEVICE
- Publication number 20080049511
- Publication date Feb 28, 2008
- STMicroelectronics S.r.I.
- LUCA CRIPPA
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR COMPACTING THE ERASED THRESHOLD VOLTAGE DISTRIBUTION OF...
- Publication number 20080049521
- Publication date Feb 28, 2008
- STMicroelectronics S.r.l.
- Rino Micheloni
- G11 - INFORMATION STORAGE
Information Patent Application
Non-volatile memory implemented with low-voltages transistors and r...
- Publication number 20080018380
- Publication date Jan 24, 2008
- STMicroelectronics S.r.l.
- Giovanni Campardo
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
METHOD AND CIRCUIT FOR ELECTRICALLY PROGRAMMING SEMICONDUCTOR MEMOR...
- Publication number 20080013378
- Publication date Jan 17, 2008
- STMicroelectronics S.r.l.
- Luca Crippa
- G11 - INFORMATION STORAGE
Information Patent Application
MULTISTAGE REGULATOR FOR CHARGE-PUMP BOOSTED VOLTAGE APPLICATIONS,...
- Publication number 20070164811
- Publication date Jul 19, 2007
- STMicroelectronics S.r.I.
- Luca Crippa
- G11 - INFORMATION STORAGE
Information Patent Application
Charge-pump type, voltage-boosting device with reduced ripple, in p...
- Publication number 20070069801
- Publication date Mar 29, 2007
- STMicroelectronics S.r.l.
- Giancarlo Ragone
- G11 - INFORMATION STORAGE
Information Patent Application
High-voltage switch with low output ripple for non-volatile floatin...
- Publication number 20070053227
- Publication date Mar 8, 2007
- STMicroelectronics S.r.l.
- Giancarlo Ragone
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
READING METHOD OF A NAND-TYPE MEMORY DEVICE AND NAND-TYPE MEMORY DE...
- Publication number 20070047316
- Publication date Mar 1, 2007
- STMicroelectronics S.r.l.
- Luca Crippa
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD OF PROGRAMMING A FOUR-LEVEL FLASH MEMORY DEVICE AND A RELATE...
- Publication number 20070035995
- Publication date Feb 15, 2007
- STMicroelectronics S.r.I.
- Luca Crippa
- G11 - INFORMATION STORAGE
Information Patent Application
Page buffer circuit and method for multi-level NAND programmable me...
- Publication number 20070030735
- Publication date Feb 8, 2007
- Luca Crippa
- G11 - INFORMATION STORAGE
Information Patent Application
Double page programming system and method
- Publication number 20070030732
- Publication date Feb 8, 2007
- Rino Micheloni
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE WITH A PAGE BUFFER HAVING AN IMPROVED L...
- Publication number 20070025148
- Publication date Feb 1, 2007
- STMicroelectronics S.r.l.
- Luca Crippa
- G11 - INFORMATION STORAGE
Information Patent Application
Circuit and method for retrieving data stored in semiconductor memo...
- Publication number 20060291322
- Publication date Dec 28, 2006
- Luca Crippa
- G11 - INFORMATION STORAGE
Information Patent Application
Data bus architecture for a semiconductor memory
- Publication number 20060140033
- Publication date Jun 29, 2006
- STMicroelectronics S.r.l.
- Luca Crippa
- G11 - INFORMATION STORAGE
Information Patent Application
Sensing circuit for a semiconductor memory
- Publication number 20060023531
- Publication date Feb 2, 2006
- STMicroelectronics S.r. I.
- Luca Crippa
- G11 - INFORMATION STORAGE
Information Patent Application
Trimming functional parameters in integrated circuits
- Publication number 20050253644
- Publication date Nov 17, 2005
- STMicroelectronics S.r. I.
- Luca Crippa
- G11 - INFORMATION STORAGE
Information Patent Application
Stabilization method for drain voltage in non-volatile multi-level...
- Publication number 20040213047
- Publication date Oct 28, 2004
- STMicroelectronics S.r.l.
- Luca Crippa
- G11 - INFORMATION STORAGE
Information Patent Application
Circuit and method for timing multi-level non-volatile memories
- Publication number 20010022753
- Publication date Sep 20, 2001
- Rino Micheloni
- G11 - INFORMATION STORAGE

Luca Crippa

Person

Patents Grantslast 30 patents

System and method for higher quality log likelihood ratios in LDPC...

System and method for accumulating soft information in LDPC decoding

System and method for memory block pool wear leveling

Nonvolatile memory system that uses programming time to reduce bit...

Method of programming a multi-level memory device

Error correction code technique for improving read stress endurance

Method of programming a multi-level memory device

Circuit and method for retrieving data stored in semiconductor memo...

Multistage regulator for charge-pump boosted voltage applications

Voltage regulator or non-volatile memories implemented with low-vol...

Method of programming cells of a NAND memory device

Page buffer for multi-level NAND electrically-programmable semicond...

Charge-pump type, voltage-boosting device with reduced ripple, in p...

Method for compacting the erased threshold voltage distribution of...

High-voltage switch with low output ripple for non-volatile floatin...

Circuit and method for electrically programming a non-volatile semi...

Non-volatile memory implemented with low-voltages transistors and r...

Circuit and method for retrieving data stored in semiconductor memo...

Semiconductor memory device with a page buffer having an improved l...

Double page programming system and method

Reading method of a NAND-type memory device and NAND-type memory de...

Page buffer circuit and method for multi-level NAND programmable me...

Data bus architecture for a semiconductor memory

Trimming functional parameters in integrated circuits

Sensing circuit for a semiconductor memory

Stabilization method for drain voltage in non-volatile multi-level...

Bandgap voltage reference circuit

Circuit and method for timing multi-level non-volatile memories

Read circuit for a nonvolatile memory

Patents Applicationslast 30 patents

NONVOLATILE MEMORY SYSTEM THAT USES PROGRAMMING TIME TO REDUCE BIT...

SYSTEM AND METHOD FOR MEMORY BLOCK POOL WEAR LEVELING

SYSTEM AND METHOD FOR HIGHER QUALITY LOG LIKELIHOOD RATIOS IN LDPC...

SYSTEM AND METHOD FOR ACCUMULATING SOFT INFORMATION IN LDPC DECODING

METHOD OF PROGRAMMING A MULTI-LEVEL MEMORY DEVICE

METHOD OF PROGRAMMING A MULTI-LEVEL MEMORY DEVICE

CIRCUIT AND METHOD FOR RETRIEVING DATA STORED IN SEMICONDUCTOR MEMO...

Page buffer for multi-level NAND electrically-programmable semicond...

METHOD OF FIXING A READ EVALUATION TIME OR THE DIFFERENCE BETWEEN A...

VOLTAGE REGULATOR OR NON-VOLATILE MEMORIES IMPLEMENTED WITH LOW-VOL...

METHOD OF PROGRAMMING CELLS OF A NAND MEMORY DEVICE

METHOD FOR COMPACTING THE ERASED THRESHOLD VOLTAGE DISTRIBUTION OF...

Non-volatile memory implemented with low-voltages transistors and r...

METHOD AND CIRCUIT FOR ELECTRICALLY PROGRAMMING SEMICONDUCTOR MEMOR...

MULTISTAGE REGULATOR FOR CHARGE-PUMP BOOSTED VOLTAGE APPLICATIONS,...

Charge-pump type, voltage-boosting device with reduced ripple, in p...

High-voltage switch with low output ripple for non-volatile floatin...

READING METHOD OF A NAND-TYPE MEMORY DEVICE AND NAND-TYPE MEMORY DE...

METHOD OF PROGRAMMING A FOUR-LEVEL FLASH MEMORY DEVICE AND A RELATE...

Page buffer circuit and method for multi-level NAND programmable me...

Double page programming system and method

SEMICONDUCTOR MEMORY DEVICE WITH A PAGE BUFFER HAVING AN IMPROVED L...

Circuit and method for retrieving data stored in semiconductor memo...

Data bus architecture for a semiconductor memory

Sensing circuit for a semiconductor memory

Trimming functional parameters in integrated circuits

Stabilization method for drain voltage in non-volatile multi-level...

Circuit and method for timing multi-level non-volatile memories