Luke ENGLAND

Person

Saratoga Springs, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Packaging stacked substrates and an integrated circuit die using a...
- Patent number 12,199,003
- Issue date Jan 14, 2025
- MARVELL ASIA PTE. LTD.
- Luke England
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked semiconductor die assemblies with multiple thermal paths an...
- Patent number 11,594,462
- Issue date Feb 28, 2023
- Micron Technology, Inc.
- Steven K. Groothuis
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
3D IC package with RDL interposer and related method
- Patent number 11,037,906
- Issue date Jun 15, 2021
- GLOBALFOUNDRIES U.S. INC.
- Luke G. England
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Metal-insulator-metal capacitors including nanofibers
- Patent number 11,038,011
- Issue date Jun 15, 2021
- GLOBALFOUNDRIES U.S. INC.
- Lili Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked semiconductor devices having dissimilar-sized dies
- Patent number 10,818,570
- Issue date Oct 27, 2020
- GLOBALFOUNDRIES Inc.
- Luke England
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Micro-LED display assembly
- Patent number 10,770,440
- Issue date Sep 8, 2020
- GLOBALFOUNDRIES Inc.
- Luke England
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for forming interconnect assemblies with probed bond pads
- Patent number 10,741,460
- Issue date Aug 11, 2020
- Micron Technology, Inc.
- Owen R. Fay
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked semiconductor die assemblies with multiple thermal paths an...
- Patent number 10,741,468
- Issue date Aug 11, 2020
- Micron Technology, Inc.
- Steven K. Groothuis
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of manufacturing RF filters
- Patent number 10,636,776
- Issue date Apr 28, 2020
- GLOBALFOUNDRIES Inc.
- Md. Sayed Kaysar Bin Rahim
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
3D IC package with RDL interposer and related method
- Patent number 10,388,631
- Issue date Aug 20, 2019
- GLOBALFOUNDRIES Inc.
- Luke G. England
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interconnect structure
- Patent number 10,381,304
- Issue date Aug 13, 2019
- GLOBALFOUNDRIES Inc.
- Luke England
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming integrated circuit package with thermally conduc...
- Patent number 10,283,487
- Issue date May 7, 2019
- GLOBALFOUNDRIES Inc.
- Luke G. England
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods and structures for mitigating ESD during wafer bonding
- Patent number 10,236,263
- Issue date Mar 19, 2019
- GLOBALFOUNDRIES Inc.
- Luke England
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interconnect structure with adhesive dielectric layer and methods o...
- Patent number 10,224,286
- Issue date Mar 5, 2019
- GLOBALFOUNDRIES Inc.
- Luke G. England
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacturing a 3 color LED integrated Si CMOS driver waf...
- Patent number 10,193,011
- Issue date Jan 29, 2019
- GLOBALFOUNDRIES Inc.
- Srinivasa Banna
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked semiconductor die assemblies with multiple thermal paths an...
- Patent number 10,170,389
- Issue date Jan 1, 2019
- Micron Technology, Inc.
- Steven K. Groothuis
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertically stacked wafers and methods of forming same
- Patent number 10,163,864
- Issue date Dec 25, 2018
- GLOBALFOUNDRIES Inc.
- Luke G. England
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Backside spacer structures for improved thermal performance
- Patent number 10,153,224
- Issue date Dec 11, 2018
- GLOBALFOUNDRIES Inc.
- Rahul Agarwal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for forming interconnect assemblies with probed bond pads
- Patent number 10,134,647
- Issue date Nov 20, 2018
- Micron Technology, Inc.
- Owen R. Fay
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Back biasing in SOI FET technology
- Patent number 10,090,227
- Issue date Oct 2, 2018
- GLOBALFOUNDRIES Inc.
- Bartlomiej Pawlak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Deep trench metal-insulator-metal capacitors
- Patent number 10,083,958
- Issue date Sep 25, 2018
- GLOBALFOUNDRIES Inc.
- Sukeshwar Kannan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Thin NiB or CoB capping layer for non-noble metallic bonding landin...
- Patent number 10,066,303
- Issue date Sep 4, 2018
- Imec VZW
- Eric Beyne
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Method, apparatus and system for voltage compensation in a semicond...
- Patent number 10,069,490
- Issue date Sep 4, 2018
- GLOBALFOUNDRIES Inc.
- Sukeshwar Kannan
- G05 - CONTROLLING REGULATING
Information Patent Grant
Wafer bond interconnect structures
- Patent number 10,026,883
- Issue date Jul 17, 2018
- GLOBALFOUNDRIES Inc.
- Luke England
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package with thermally conductive pillar
- Patent number 9,865,570
- Issue date Jan 9, 2018
- GLOBALFOUNDRIES Inc.
- Luke G. England
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Latency compensation network using timing slack sensors
- Patent number 9,716,487
- Issue date Jul 25, 2017
- GLOBALFOUNDRIES Inc.
- Sukeshwar Kannan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Methods of fabricating semiconductor die assemblies
- Patent number 9,711,494
- Issue date Jul 18, 2017
- Micron Technology, Inc.
- Luke G. England
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interconnect assemblies with probed bond pads
- Patent number 9,646,899
- Issue date May 9, 2017
- Micron Technology, Inc.
- Owen R. Fay
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuits including magnetic core inductors and methods f...
- Patent number 9,613,897
- Issue date Apr 4, 2017
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Mahesh Bhatkar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and process for integration of TSV-middle in 3D IC stacks
- Patent number 9,553,080
- Issue date Jan 24, 2017
- GLOBALFOUNDRIES Inc.
- Luke England
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
GLASS CARRIER STACKED PACKAGE ASSEMBLY METHOD
- Publication number 20220270909
- Publication date Aug 25, 2022
- Marvell Asia Pte Ltd.
- Richard Graf
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Packaging stacked substrates and an integrated circuit die using a...
- Publication number 20220051963
- Publication date Feb 17, 2022
- Marvell Asia Pte Ltd.
- Luke England
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METAL-INSULATOR-METAL CAPACITORS INCLUDING NANOFIBERS
- Publication number 20210126086
- Publication date Apr 29, 2021
- GLOBALFOUNDRIES U.S. Inc.
- Lili Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKED SEMICONDUCTOR DEVICES HAVING DISSIMILAR-SIZED DIES
- Publication number 20200365481
- Publication date Nov 19, 2020
- GLOBALFOUNDRIES INC.
- LUKE ENGLAND
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKED SEMICONDUCTOR DIE ASSEMBLIES WITH MULTIPLE THERMAL PATHS AN...
- Publication number 20200350224
- Publication date Nov 5, 2020
- Micron Technology, Inc.
- Steven K. Groothuis
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3D IC PACKAGE WITH RDL INTERPOSER AND RELATED METHOD
- Publication number 20190304954
- Publication date Oct 3, 2019
- GLOBALFOUNDRIES INC.
- Luke G. England
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF MANUFACTURING RF FILTERS
- Publication number 20190267361
- Publication date Aug 29, 2019
- GLOBALFOUNDRIES INC.
- Md. Sayed Kaysar Bin Rahim
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
3D IC PACKAGE WITH RDL INTERPOSER AND RELATED METHOD
- Publication number 20190237430
- Publication date Aug 1, 2019
- GLOBALFOUNDRIES INC.
- Luke G. England
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKED SEMICONDUCTOR DIE ASSEMBLIES WITH MULTIPLE THERMAL PATHS AN...
- Publication number 20190122950
- Publication date Apr 25, 2019
- Micron Technology, Inc.
- Steven K. Groothuis
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS AND STRUCTURES FOR MITIGATING ESD DURING WAFER BONDING
- Publication number 20190067217
- Publication date Feb 28, 2019
- GLOBALFOUNDRIES INC.
- Luke England
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR FORMING INTERCONNECT ASSEMBLIES WITH PROBED BOND PADS
- Publication number 20190051569
- Publication date Feb 14, 2019
- Micron Technology, Inc.
- Owen R. Fay
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERCONNECT STRUCTURE
- Publication number 20190035731
- Publication date Jan 31, 2019
- GLOBALFOUNDRIES INC.
- Luke ENGLAND
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF MANUFACTURING A 3 COLOR LED INTEGRATED SI CMOS DRIVER WAF...
- Publication number 20190019915
- Publication date Jan 17, 2019
- GLOBALFOUNDRIES INC.
- Srinivasa BANNA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICRO-LED DISPLAY ASSEMBLY
- Publication number 20180269191
- Publication date Sep 20, 2018
- GLOBALFOUNDRIES INC.
- Luke ENGLAND
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE WITH THERMALLY CONDUCTIVE PILLAR
- Publication number 20180233488
- Publication date Aug 16, 2018
- GLOBALFOUNDRIES INC.
- Luke G. England
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WAFER BOND INTERCONNECT STRUCTURES
- Publication number 20180175266
- Publication date Jun 21, 2018
- GLOBALFOUNDRIES INC.
- Luke ENGLAND
- F21 - LIGHTING
Information Patent Application
DEEP TRENCH METAL-INSULATOR-METAL CAPACITORS
- Publication number 20180108651
- Publication date Apr 19, 2018
- GLOBALFOUNDRIES INC.
- Sukeshwar Kannan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BACKSIDE SPACER STRUCTURES FOR IMPROVED THERMAL PERFORMANCE
- Publication number 20180076110
- Publication date Mar 15, 2018
- GLOBALFOUNDRIES INC.
- Rahul AGARWAL
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD, APPARATUS AND SYSTEM FOR VOLTAGE COMPENSATION IN A SEMICOND...
- Publication number 20170222634
- Publication date Aug 3, 2017
- GLOBALFOUNDRIES INC.
- Sukeshwar Kannan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHODS FOR FORMING INTERCONNECT ASSEMBLIES WITH PROBED BOND PADS
- Publication number 20170207139
- Publication date Jul 20, 2017
- Micron Technology, Inc.
- Owen R. Fay
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD AND STRUCTURE FOR LOW-K FACE-TO-FACE BONDED WAFER DICING
- Publication number 20170062399
- Publication date Mar 2, 2017
- GLOBALFOUNDRIES INC.
- Luke ENGLAND
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BOND PAD STRUCTURE FOR LOW TEMPERATURE FLIP CHIP BONDING
- Publication number 20170040274
- Publication date Feb 9, 2017
- GLOBALFOUNDRIES INC.
- Luke ENGLAND
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICES AND PACKAGES INCLUDING CONDUCTIVE UNDERFILL M...
- Publication number 20160351530
- Publication date Dec 1, 2016
- Micron Technology, Inc.
- Jaspreet S. Gandhi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATION STRUCTURES FOR HIGH CURRENT APPLICATIONS
- Publication number 20160293579
- Publication date Oct 6, 2016
- GLOBALFOUNDRIES INC.
- Luke ENGLAND
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUITS INCLUDING MAGNETIC CORE INDUCTORS AND METHODS F...
- Publication number 20160133565
- Publication date May 12, 2016
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Mahesh Bhatkar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BOND PAD STRUCTURE FOR LOW TEMPERATURE FLIP CHIP BONDING
- Publication number 20160111386
- Publication date Apr 21, 2016
- GLOBALFOUNDRIES INC.
- Luke ENGLAND
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FABRICATION OF MULTILAYER CIRCUIT ELEMENTS
- Publication number 20160013262
- Publication date Jan 14, 2016
- GLOBALFOUNDRIES INC.
- Luke ENGLAND
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKED SEMICONDUCTOR DIE ASSEMBLIES WITH MULTIPLE THERMAL PATHS AN...
- Publication number 20150348956
- Publication date Dec 3, 2015
- Micron Technology, Inc.
- Steven K. Groothuis
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THIN NIB OR COB CAPPING LAYER FOR NON-NOBLE METALLIC BONDING LANDIN...
- Publication number 20150247244
- Publication date Sep 3, 2015
- IMEC vzw
- Eric Beyne
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
METHODS OF FABRICATING SEMICONDUCTOR DIE ASSEMBLIES
- Publication number 20150132869
- Publication date May 14, 2015
- Micron Technology, Inc.
- Luke G. England
- H01 - BASIC ELECTRIC ELEMENTS

Luke ENGLAND

Person

Patents Grantslast 30 patents

Packaging stacked substrates and an integrated circuit die using a...

Stacked semiconductor die assemblies with multiple thermal paths an...

3D IC package with RDL interposer and related method

Metal-insulator-metal capacitors including nanofibers

Stacked semiconductor devices having dissimilar-sized dies

Micro-LED display assembly

Methods for forming interconnect assemblies with probed bond pads

Stacked semiconductor die assemblies with multiple thermal paths an...

Methods of manufacturing RF filters

3D IC package with RDL interposer and related method

Interconnect structure

Methods of forming integrated circuit package with thermally conduc...

Methods and structures for mitigating ESD during wafer bonding

Interconnect structure with adhesive dielectric layer and methods o...

Method of manufacturing a 3 color LED integrated Si CMOS driver waf...

Stacked semiconductor die assemblies with multiple thermal paths an...

Vertically stacked wafers and methods of forming same

Backside spacer structures for improved thermal performance

Methods for forming interconnect assemblies with probed bond pads

Back biasing in SOI FET technology

Deep trench metal-insulator-metal capacitors

Thin NiB or CoB capping layer for non-noble metallic bonding landin...

Method, apparatus and system for voltage compensation in a semicond...

Wafer bond interconnect structures

Integrated circuit package with thermally conductive pillar

Latency compensation network using timing slack sensors

Methods of fabricating semiconductor die assemblies

Interconnect assemblies with probed bond pads

Integrated circuits including magnetic core inductors and methods f...

Method and process for integration of TSV-middle in 3D IC stacks

Patents Applicationslast 30 patents

GLASS CARRIER STACKED PACKAGE ASSEMBLY METHOD

Packaging stacked substrates and an integrated circuit die using a...

METAL-INSULATOR-METAL CAPACITORS INCLUDING NANOFIBERS

STACKED SEMICONDUCTOR DEVICES HAVING DISSIMILAR-SIZED DIES

STACKED SEMICONDUCTOR DIE ASSEMBLIES WITH MULTIPLE THERMAL PATHS AN...

3D IC PACKAGE WITH RDL INTERPOSER AND RELATED METHOD

METHODS OF MANUFACTURING RF FILTERS

3D IC PACKAGE WITH RDL INTERPOSER AND RELATED METHOD

STACKED SEMICONDUCTOR DIE ASSEMBLIES WITH MULTIPLE THERMAL PATHS AN...

METHODS AND STRUCTURES FOR MITIGATING ESD DURING WAFER BONDING

METHODS FOR FORMING INTERCONNECT ASSEMBLIES WITH PROBED BOND PADS

INTERCONNECT STRUCTURE

METHOD OF MANUFACTURING A 3 COLOR LED INTEGRATED SI CMOS DRIVER WAF...

MICRO-LED DISPLAY ASSEMBLY

INTEGRATED CIRCUIT PACKAGE WITH THERMALLY CONDUCTIVE PILLAR

WAFER BOND INTERCONNECT STRUCTURES

DEEP TRENCH METAL-INSULATOR-METAL CAPACITORS

BACKSIDE SPACER STRUCTURES FOR IMPROVED THERMAL PERFORMANCE

METHOD, APPARATUS AND SYSTEM FOR VOLTAGE COMPENSATION IN A SEMICOND...

METHODS FOR FORMING INTERCONNECT ASSEMBLIES WITH PROBED BOND PADS

METHOD AND STRUCTURE FOR LOW-K FACE-TO-FACE BONDED WAFER DICING

BOND PAD STRUCTURE FOR LOW TEMPERATURE FLIP CHIP BONDING

SEMICONDUCTOR DEVICES AND PACKAGES INCLUDING CONDUCTIVE UNDERFILL M...

INTEGRATION STRUCTURES FOR HIGH CURRENT APPLICATIONS

INTEGRATED CIRCUITS INCLUDING MAGNETIC CORE INDUCTORS AND METHODS F...

BOND PAD STRUCTURE FOR LOW TEMPERATURE FLIP CHIP BONDING

FABRICATION OF MULTILAYER CIRCUIT ELEMENTS

STACKED SEMICONDUCTOR DIE ASSEMBLIES WITH MULTIPLE THERMAL PATHS AN...

THIN NIB OR COB CAPPING LAYER FOR NON-NOBLE METALLIC BONDING LANDIN...

METHODS OF FABRICATING SEMICONDUCTOR DIE ASSEMBLIES