MARGARET SIMMONS-MATTHEWS

Person

RICHARDSON, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Laser-assisted cleaving of a reconstituted wafer for stacked die as...
- Patent number 8,815,642
- Issue date Aug 26, 2014
- Texas Instruments Incorporated
- Jeffrey Alan West
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
TCE compensation for package substrates for reduced die warpage ass...
- Patent number 8,759,154
- Issue date Jun 24, 2014
- Texas Instruments Incorporated
- Margaret Simmons-Matthews
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for attaching wide bus memory and serial memory to a process...
- Patent number 8,597,978
- Issue date Dec 3, 2013
- Texas Instruments Incorporated
- Kurt Wachtler
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Laser-assisted cleaving of a reconstituted wafer for stacked die as...
- Patent number 8,575,758
- Issue date Nov 5, 2013
- Texas Instruments Incorporated
- Jeffrey Alan West
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electronic assembly including die on substrate with heat spreader h...
- Patent number 8,526,186
- Issue date Sep 3, 2013
- Texas Instruments Incorporated
- Satoshi Yokoya
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Lateral coupling enabled topside only dual-side testing of TSV die...
- Patent number 8,471,577
- Issue date Jun 25, 2013
- Texas Instruments Incorporated
- Daniel Joseph Stillman
- G01 - MEASURING TESTING
Information Patent Grant
Through carrier dual side loop-back testing of TSV die after die at...
- Patent number 8,344,749
- Issue date Jan 1, 2013
- Texas Instruments Incorporated
- Daniel Joseph Stillman
- G01 - MEASURING TESTING
Information Patent Grant
Warpage control features on the bottomside of TSV die lateral to pr...
- Patent number 8,344,493
- Issue date Jan 1, 2013
- Texas Instruments Incorporated
- Jeffrey Alan West
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked die assemblies including TSV die
- Patent number 8,313,982
- Issue date Nov 20, 2012
- Texas Instruments Incorporated
- Rajiv Dunne
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
TCE compensation for package substrates for reduced die warpage ass...
- Patent number 8,298,863
- Issue date Oct 30, 2012
- Texas Instruments Incorporated
- Margaret Simmons-Matthews
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for attaching wide bus memory and serial memory to a process...
- Patent number 8,288,849
- Issue date Oct 16, 2012
- Texas Instruments Incorporated
- Kurt Wachtler
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
IC die having TSV and wafer level underfill and stacked IC devices...
- Patent number 8,227,295
- Issue date Jul 24, 2012
- Texas Instruments Incorporated
- Margaret R. Simmons-Matthews
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
IC having TSV arrays with reduced TSV induced stress
- Patent number 8,097,964
- Issue date Jan 17, 2012
- Texas Instruments Incorporated
- Jeffrey Alan West
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor packages and methods for manufacturing such semicondu...
- Patent number 6,768,212
- Issue date Jul 27, 2004
- Texas Instruments Incorporated
- Akira Karashima
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
ELECTRONIC ASSEMBLY INCLUDES A COMPOSITE CARRIER
- Publication number 20140183719
- Publication date Jul 3, 2014
- TEXAS INSTRUMENTS INCORPORATED
- Margaret Rose Simmons-Matthews
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIE HAVING THROUGH-SUBSTRATE VIAS WITH DEFORMATION PROTECTED TIPS
- Publication number 20140151895
- Publication date Jun 5, 2014
- TEXAS INSTRUMENTS INCORPORATED
- JEFFREY ALAN WEST
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THROUGH-SILICON VIA (TSV) DIE AND METHOD TO CONTROL WARPAGE
- Publication number 20140124900
- Publication date May 8, 2014
- TEXAS INSTRUMENTS INCORPORATED
- JEFFREY ALAN WEST
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Laser-Assisted Cleaving of a Reconstituted Wafer for Stacked Die As...
- Publication number 20140038359
- Publication date Feb 6, 2014
- TEXAS INSTRUMENTS INCORPORATED
- JEFFREY ALAN WEST
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Stacked IC Devices Comprising a Workpiece Solder Connected to the TSV
- Publication number 20130099384
- Publication date Apr 25, 2013
- TEXAS INSTRUMENTS INCORPORATED
- Margaret R. Simmons-Matthews
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated Circuit Package And Method
- Publication number 20130082407
- Publication date Apr 4, 2013
- TEXAS INSTRUMENTS INCORPORATED
- Donald C. Abbott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LASER-ASSISTED CLEAVING OF A RECONSTITUTED WAFER FOR STACKED DIE AS...
- Publication number 20130032946
- Publication date Feb 7, 2013
- TEXAS INSTRUMENTS INCORPORATED
- JEFFREY ALAN WEST
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TCE Compensation for Package Substrates for Reduced Die Warpage Ass...
- Publication number 20130029457
- Publication date Jan 31, 2013
- TEXAS INSTRUMENTS INCORPORATED
- Margaret Simmons-Matthews
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Electronic Assembly Including Die on Substrate With Heat Spreader H...
- Publication number 20130016477
- Publication date Jan 17, 2013
- TEXAS INSTRUMENTS INCORPORATED
- Satoshi Yokoya
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for Attaching Wide Bus Memory and Serial Memory to a Process...
- Publication number 20120225523
- Publication date Sep 6, 2012
- TEXAS INSTRUMENTS INCORPORATED
- Kurt Wachtler
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WARPAGE CONTROL FEATURES ON THE BOTTOMSIDE OF TSV DIE LATERAL TO PR...
- Publication number 20120175774
- Publication date Jul 12, 2012
- TEXAS INSTRUMENTS INCORPORATED
- Jeffrey Alan West
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKED DIE ASSEMBLIES INCLUDING TSV DIE
- Publication number 20120070939
- Publication date Mar 22, 2012
- TEXAS INSTRUMENTS INCORPORATED
- Rajiv Dunne
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LATERAL COUPLING ENABLED TOPSIDE ONLY DUAL-SIDE TESTING OF TSV DIE...
- Publication number 20110304349
- Publication date Dec 15, 2011
- TEXAS INSTRUMENTS INCORPORATED
- Daniel Joseph Stillman
- G01 - MEASURING TESTING
Information Patent Application
THROUGH CARRIER DUAL SIDE LOOP-BACK TESTING OF TSV DIE AFTER DIE AT...
- Publication number 20110298488
- Publication date Dec 8, 2011
- TEXAS INSTRUMENTS INCORPORATED
- Daniel Joseph Stillman
- G01 - MEASURING TESTING
Information Patent Application
METHOD FOR ATTACHING WIDE BUS MEMORY AND SERIAL MEMORY TO A PROCESS...
- Publication number 20110272814
- Publication date Nov 10, 2011
- Kurt Wachtler
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TCE COMPENSATION FOR PACKAGE SUBSTRATES FOR REDUCED DIE WARPAGE ASS...
- Publication number 20110266693
- Publication date Nov 3, 2011
- TEXAS INSTRUMENTS INCORPORATED
- Margaret Rose Simmons-Matthews
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR CONTROLLING WAFER AND PACKAGE WARPAGE DURING ASSEMBLY O...
- Publication number 20100190294
- Publication date Jul 29, 2010
- Margaret R. Simmons-Matthews
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
IC HAVING TSV ARRAYS WITH REDUCED TSV INDUCED STRESS
- Publication number 20100171226
- Publication date Jul 8, 2010
- Texas Instruments, Inc.
- Jeffrey Alan West
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
IC DIE HAVING TSV AND WAFER LEVEL UNDERFILL AND STACKED IC DEVICES...
- Publication number 20100096738
- Publication date Apr 22, 2010
- TEXAS INSTRUMENTS INCORPORATED
- Margaret R. Simmons-Matthews
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor wafer with ditched scribe street
- Publication number 20050266661
- Publication date Dec 1, 2005
- Lei Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor packages and methods for manufacturing such semicondu...
- Publication number 20030137033
- Publication date Jul 24, 2003
- Akira Karashima
- H01 - BASIC ELECTRIC ELEMENTS

MARGARET SIMMONS-MATTHEWS

Person

Patents Grantslast 30 patents

Laser-assisted cleaving of a reconstituted wafer for stacked die as...

TCE compensation for package substrates for reduced die warpage ass...

Method for attaching wide bus memory and serial memory to a process...

Laser-assisted cleaving of a reconstituted wafer for stacked die as...

Electronic assembly including die on substrate with heat spreader h...

Lateral coupling enabled topside only dual-side testing of TSV die...

Through carrier dual side loop-back testing of TSV die after die at...

Warpage control features on the bottomside of TSV die lateral to pr...

Stacked die assemblies including TSV die

TCE compensation for package substrates for reduced die warpage ass...

Method for attaching wide bus memory and serial memory to a process...

IC die having TSV and wafer level underfill and stacked IC devices...

IC having TSV arrays with reduced TSV induced stress

Semiconductor packages and methods for manufacturing such semicondu...

Patents Applicationslast 30 patents

ELECTRONIC ASSEMBLY INCLUDES A COMPOSITE CARRIER

DIE HAVING THROUGH-SUBSTRATE VIAS WITH DEFORMATION PROTECTED TIPS

THROUGH-SILICON VIA (TSV) DIE AND METHOD TO CONTROL WARPAGE

Laser-Assisted Cleaving of a Reconstituted Wafer for Stacked Die As...

Stacked IC Devices Comprising a Workpiece Solder Connected to the TSV

Integrated Circuit Package And Method

LASER-ASSISTED CLEAVING OF A RECONSTITUTED WAFER FOR STACKED DIE AS...

TCE Compensation for Package Substrates for Reduced Die Warpage Ass...

Electronic Assembly Including Die on Substrate With Heat Spreader H...

Method for Attaching Wide Bus Memory and Serial Memory to a Process...

WARPAGE CONTROL FEATURES ON THE BOTTOMSIDE OF TSV DIE LATERAL TO PR...

STACKED DIE ASSEMBLIES INCLUDING TSV DIE

LATERAL COUPLING ENABLED TOPSIDE ONLY DUAL-SIDE TESTING OF TSV DIE...

THROUGH CARRIER DUAL SIDE LOOP-BACK TESTING OF TSV DIE AFTER DIE AT...

METHOD FOR ATTACHING WIDE BUS MEMORY AND SERIAL MEMORY TO A PROCESS...

TCE COMPENSATION FOR PACKAGE SUBSTRATES FOR REDUCED DIE WARPAGE ASS...

METHODS FOR CONTROLLING WAFER AND PACKAGE WARPAGE DURING ASSEMBLY O...

IC HAVING TSV ARRAYS WITH REDUCED TSV INDUCED STRESS

IC DIE HAVING TSV AND WAFER LEVEL UNDERFILL AND STACKED IC DEVICES...

Semiconductor wafer with ditched scribe street

Semiconductor packages and methods for manufacturing such semicondu...