Martin M. Deneroff

Person

New York, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Diadic memory operations and expanded memory frontend operations
- Patent number 10,853,251
- Issue date Dec 1, 2020
- Lucata Corporation
- Martin M. Deneroff
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Diadic memory operations and expanded memory frontend operations
- Patent number 10,628,310
- Issue date Apr 21, 2020
- Lucata Corporation
- Martin M. Deneroff
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallel computer architecture for computation of particle interact...
- Patent number 9,747,099
- Issue date Aug 29, 2017
- D. E. Shaw Research LLC
- David E. Shaw
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallel processing system for computing particle interactions
- Patent number 9,612,832
- Issue date Apr 4, 2017
- D. E. Shaw Research LLC
- David E. Shaw
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Network topology for a scalable multiprocessor system
- Patent number 9,514,092
- Issue date Dec 6, 2016
- Silicon Graphics International Corp.
- Martin M. Deneroff
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Network topology for a scalable multiprocessor system
- Patent number 8,433,816
- Issue date Apr 30, 2013
- Silicon Graphics International Corp.
- Martin M. Deneroff
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for performing cache coherency in a computer system
- Patent number 8,402,225
- Issue date Mar 19, 2013
- Silicon Graphics International Corp.
- Steven C. Miller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for performing memory operations in a computing s...
- Patent number 8,321,634
- Issue date Nov 27, 2012
- Silicon Graphics International Corp.
- Steven C. Miller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Approaches and architectures for computation of particle interactions
- Patent number 8,015,238
- Issue date Sep 6, 2011
- D. E. Shaw Research LLC
- Kevin J. Bowers
Information Patent Grant
System and method for performing memory operations in a computing s...
- Patent number 7,925,839
- Issue date Apr 12, 2011
- Silicon Graphics International
- Steven C. Miller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiprocessor node controller circuit and method
- Patent number 7,881,321
- Issue date Feb 1, 2011
- Silicon Graphics International
- Martin M. Deneroff
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for performing cache coherency in a computer system
- Patent number 7,802,058
- Issue date Sep 21, 2010
- Silicon Graphics International
- Steven C. Miller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiprocessor node controller circuit and method
- Patent number 7,406,086
- Issue date Jul 29, 2008
- Silicon Graphics, Inc.
- Martin M. Deneroff
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for performing memory operations in a computing s...
- Patent number 7,398,359
- Issue date Jul 8, 2008
- Silicon Graphics, Inc.
- Steven C. Miller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for providing access to a bus
- Patent number 7,197,589
- Issue date Mar 27, 2007
- Silicon Graphics, Inc.
- Martin M. Deneroff
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for performing address translation in a computer...
- Patent number 7,181,589
- Issue date Feb 20, 2007
- Silicon Graphics, Inc.
- Steven C. Miller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalable hypercube multiprocessor network for massive parallel proc...
- Patent number 6,973,559
- Issue date Dec 6, 2005
- Silicon Graphics, Inc.
- Martin M. Deneroff
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for cache coherence in DSM multiprocessor system...
- Patent number 6,877,030
- Issue date Apr 5, 2005
- Silicon Graphics, Inc.
- Martin M. Deneroff
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for a hierarchical system management architecture...
- Patent number 6,845,410
- Issue date Jan 18, 2005
- Silicon Graphics, Inc.
- Michael Brown
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Modular computing architecture having common communication interface
- Patent number 6,829,666
- Issue date Dec 7, 2004
- Silicon Graphics, Incorporated
- Martin M. Deneroff
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiprocessor node controller circuit and method
- Patent number 6,751,698
- Issue date Jun 15, 2004
- Silicon Graphics, Inc.
- Martin M. Deneroff
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for handling invalidation requests to processo...
- Patent number 6,578,115
- Issue date Jun 10, 2003
- Silicon Graphics, Inc.
- David E. McCracken
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Partitioning a distributed shared memory multiprocessor computer to...
- Patent number 6,516,372
- Issue date Feb 4, 2003
- Silicon Graphics, Inc.
- Russell Jay Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for handling invalidation requests to processo...
- Patent number 6,339,812
- Issue date Jan 15, 2002
- Silicon Graphics, Inc.
- David E. McCracken
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory system with switching for data isolation
- Patent number 6,215,686
- Issue date Apr 10, 2001
- Silicon Graphics, Inc.
- Martin M. Deneroff
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system with switching for data isolation
- Patent number 6,115,278
- Issue date Sep 5, 2000
- Silicon Graphics, Inc.
- Martin M. Deneroff
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method of implementing read resources to maintain cache...
- Patent number 5,664,151
- Issue date Sep 2, 1997
- Silicon Graphics, Inc.
- Michael B. Galles
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for fair arbitration on a multi-domain multiproce...
- Patent number 5,509,125
- Issue date Apr 16, 1996
- Silicon Graphics, Inc.
- Scott D. Johnson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method of implementing read resources to maintain cache...
- Patent number 5,504,874
- Issue date Apr 2, 1996
- Silicon Graphics, Inc.
- Michael B. Galles
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High memory capacity DRAM SIMM
- Patent number 5,272,664
- Issue date Dec 21, 1993
- Silicon Graphics, Inc.
- David Alexander
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
DIADIC MEMORY OPERATIONS AND EXPANDED MEMORY FRONTEND OPERATIONS
- Publication number 20190377678
- Publication date Dec 12, 2019
- EMU SOLUTIONS, INC.
- Martin M. Deneroff
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DIADIC MEMORY OPERATIONS AND EXPANDED MEMORY FRONTEND OPERATIONS
- Publication number 20180225203
- Publication date Aug 9, 2018
- EMU SOLUTIONS, INC.
- Martin M. Deneroff
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NETWORK TOPOLOGY FOR A SCALABLE MULTIPROCESSOR SYSTEM
- Publication number 20160337229
- Publication date Nov 17, 2016
- Silicon Graphics International Corp.
- Martin M. Deneroff
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Method for Performing Cache Coherency in a Computer System
- Publication number 20130282988
- Publication date Oct 24, 2013
- Steve C. Miller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NETWORK TOPOLOGY FOR A SCALABLE MULTIPROCESSOR SYSTEM
- Publication number 20130246653
- Publication date Sep 19, 2013
- Martin M. Deneroff
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARALLEL PROCESSING SYSTEM FOR COMPUTING PARTICLE INTERACTIONS
- Publication number 20130173889
- Publication date Jul 4, 2013
- David E. Shaw
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARALLEL COMPUTER ARCHITECTURE FOR COMPUTATION OF PARTICLE INTERACT...
- Publication number 20130091341
- Publication date Apr 11, 2013
- D.E. Shaw Research LLC
- David E. Shaw
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and Method for Performing Memory Operations In A Computing S...
- Publication number 20130080709
- Publication date Mar 28, 2013
- Steven C. Miller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ZONAL METHODS FOR COMPUTATION OF PARTICLE INTERACTIONS
- Publication number 20120116737
- Publication date May 10, 2012
- D.E. Shaw Research LLC
- Kevin J. Bowers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR PERFORMING MEMORY OPERATIONS IN A COMPUTING S...
- Publication number 20110191545
- Publication date Aug 4, 2011
- Steven C. Miller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for Performing Cache Coherency in a Computer System
- Publication number 20110016277
- Publication date Jan 20, 2011
- Steven C. Miller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NETWORK TOPOLOGY FOR A SCALABLE MULTIPROCESSOR SYSTEM
- Publication number 20090113172
- Publication date Apr 30, 2009
- Silicon Graphics, Inc.
- Martin M. Deneroff
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multiprocessor Node Controller Circuit and Method
- Publication number 20090024833
- Publication date Jan 22, 2009
- Silicon Graphics, Inc.
- Martin M. Deneroff
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Approaches and architectures for computation of particle interactions
- Publication number 20080243452
- Publication date Oct 2, 2008
- Kevin J. Bowers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Network topology for a scalable multiprocessor system
- Publication number 20060282648
- Publication date Dec 14, 2006
- Silicon Graphics, Inc.
- Martin M. Deneroff
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for performing address translation in a computer...
- Publication number 20050066147
- Publication date Mar 24, 2005
- Steven C. Miller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multiprocessor node controller circuit and method
- Publication number 20050053057
- Publication date Mar 10, 2005
- Silicon Graphics, Inc.
- Martin M. Deneroff
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and system for cache coherence in DSM multiprocessor system...
- Publication number 20030163543
- Publication date Aug 28, 2003
- Silicon Graphics, Inc.
- Martin M. Deneroff
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for handling invalidation requests to processo...
- Publication number 20020059500
- Publication date May 16, 2002
- Silicon Graphics, Inc., a Delaware corporation
- David E. McCracken
- G06 - COMPUTING CALCULATING COUNTING

Martin M. Deneroff

Person

Patents Grantslast 30 patents

Diadic memory operations and expanded memory frontend operations

Diadic memory operations and expanded memory frontend operations

Parallel computer architecture for computation of particle interact...

Parallel processing system for computing particle interactions

Network topology for a scalable multiprocessor system

Network topology for a scalable multiprocessor system

Method for performing cache coherency in a computer system

System and method for performing memory operations in a computing s...

Approaches and architectures for computation of particle interactions

System and method for performing memory operations in a computing s...

Multiprocessor node controller circuit and method

Method for performing cache coherency in a computer system

Multiprocessor node controller circuit and method

System and method for performing memory operations in a computing s...

System and method for providing access to a bus

System and method for performing address translation in a computer...

Scalable hypercube multiprocessor network for massive parallel proc...

Method and system for cache coherence in DSM multiprocessor system...

System and method for a hierarchical system management architecture...

Modular computing architecture having common communication interface

Multiprocessor node controller circuit and method

Method and apparatus for handling invalidation requests to processo...

Partitioning a distributed shared memory multiprocessor computer to...

Method and apparatus for handling invalidation requests to processo...

Memory system with switching for data isolation

Memory system with switching for data isolation

System and method of implementing read resources to maintain cache...

System and method for fair arbitration on a multi-domain multiproce...

System and method of implementing read resources to maintain cache...

High memory capacity DRAM SIMM

Patents Applicationslast 30 patents

DIADIC MEMORY OPERATIONS AND EXPANDED MEMORY FRONTEND OPERATIONS

DIADIC MEMORY OPERATIONS AND EXPANDED MEMORY FRONTEND OPERATIONS

NETWORK TOPOLOGY FOR A SCALABLE MULTIPROCESSOR SYSTEM

Method for Performing Cache Coherency in a Computer System

NETWORK TOPOLOGY FOR A SCALABLE MULTIPROCESSOR SYSTEM

PARALLEL PROCESSING SYSTEM FOR COMPUTING PARTICLE INTERACTIONS

PARALLEL COMPUTER ARCHITECTURE FOR COMPUTATION OF PARTICLE INTERACT...

System and Method for Performing Memory Operations In A Computing S...

ZONAL METHODS FOR COMPUTATION OF PARTICLE INTERACTIONS

SYSTEM AND METHOD FOR PERFORMING MEMORY OPERATIONS IN A COMPUTING S...

Method for Performing Cache Coherency in a Computer System

NETWORK TOPOLOGY FOR A SCALABLE MULTIPROCESSOR SYSTEM

Multiprocessor Node Controller Circuit and Method

Approaches and architectures for computation of particle interactions

Network topology for a scalable multiprocessor system

System and method for performing address translation in a computer...

Multiprocessor node controller circuit and method

Method and system for cache coherence in DSM multiprocessor system...

Method and apparatus for handling invalidation requests to processo...