Marzio Pedrali-Noy

Person

San Diego, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Robust circuitry for passive fundamental components
- Patent number 12,181,963
- Issue date Dec 31, 2024
- QUALCOMM Incorporated
- Yi-Hung Tseng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Robust transistor circuitry
- Patent number 12,040,785
- Issue date Jul 16, 2024
- QUALCOMM Incorporated
- Yi-Hung Tseng
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High gain low power phase detector and loop filter for phase lock l...
- Patent number 12,015,415
- Issue date Jun 18, 2024
- QUALCOMM Incorporated
- Sungmin Ock
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Clock screening with programmable counter-based clock interface and...
- Patent number 10,707,854
- Issue date Jul 7, 2020
- QUALCOMM Incorporated
- Zhengzheng Wu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Process-invariant resistor and capacitor pair
- Patent number 10,553,531
- Issue date Feb 4, 2020
- QUALCOMM Incorporated
- Chao Song
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Clock screening with programmable counter-based clock interface and...
- Patent number 10,520,901
- Issue date Dec 31, 2019
- QUALCOMM Incorporated
- Zhengzheng Wu
- G04 - HOROLOGY
Information Patent Grant
Circuits and methods providing clock frequency adjustment in respon...
- Patent number 9,634,676
- Issue date Apr 25, 2017
- QUALCOMM Incorporated
- Ashok Swaminathan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Fast frequency throttling and re-locking technique for phase-locked...
- Patent number 9,602,113
- Issue date Mar 21, 2017
- QUALCOMM Incorporated
- Ian Andrew Galton
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Low latency synchronization scheme for mesochronous DDR system
- Patent number 9,437,278
- Issue date Sep 6, 2016
- QUALCOMM Incorporated
- Edwin Jose
- G11 - INFORMATION STORAGE
Information Patent Grant
Low latency synchronization scheme for mesochronous DDR system
- Patent number 9,123,408
- Issue date Sep 1, 2015
- QUALCOMM Incorporated
- Edwin Jose
- G11 - INFORMATION STORAGE
Information Patent Grant
Temperature-independent oscillators and delay elements
- Patent number 8,742,815
- Issue date Jun 3, 2014
- QUALCOMM Incorporated
- Sameer Wadhwa
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Circuit for detecting a voltage change using a time-to-digital conv...
- Patent number 8,669,794
- Issue date Mar 11, 2014
- QUALCOMM Incorporated
- Sang Wook Park
- G01 - MEASURING TESTING
Information Patent Grant
Injection-locking a slave oscillator to a master oscillator with no...
- Patent number 8,570,108
- Issue date Oct 29, 2013
- QUALCOMM Incorporated
- Ashwin Ragunathan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Duty cycle correction circuitry
- Patent number 8,380,138
- Issue date Feb 19, 2013
- QUALCOMM Incorporated
- Sameer Wadhwa
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Supply-regulated VCO architecture
- Patent number 8,362,848
- Issue date Jan 29, 2013
- QUALCOMM Incorporated
- Ashwin Raghunathan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
PLL charge pump with reduced coupling to bias nodes
- Patent number 8,330,511
- Issue date Dec 11, 2012
- QUALCOMM Incorporated
- Ashwin Raghunathan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Techniques for minimizing control voltage noise due to charge pump...
- Patent number 8,164,369
- Issue date Apr 24, 2012
- QUALCOMM Incorporated
- Ashwin Raghunathan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Recalibration systems and techniques for electronic memory applicat...
- Patent number 8,159,888
- Issue date Apr 17, 2012
- QUALCOMM Incorporated
- Ashwin Raghunathan
- G11 - INFORMATION STORAGE
Information Patent Grant
Current-mode gain-splitting dual-path VCO
- Patent number 8,143,957
- Issue date Mar 27, 2012
- Qualcomm, Incorporated
- Xiaohong Quan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable delay circuit with integer and fractional time resolution
- Patent number 8,120,409
- Issue date Feb 21, 2012
- Qualcomm, Incorporated
- Mustafa Keskin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Supply-regulated phase-locked loop (PLL) and method of using
- Patent number 7,973,612
- Issue date Jul 5, 2011
- QUALCOMM Incorporated
- Ashwin Raghunathan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Delay circuits matching delays of synchronous circuits
- Patent number 7,940,100
- Issue date May 10, 2011
- Qualcomm, Incorporated
- Mustafa Keskin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Techniques for minimizing control voltage ripple due to charge pump...
- Patent number 7,932,757
- Issue date Apr 26, 2011
- QUALCOMM Incorporated
- Ashwin Raghunathan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Periodic timing jitter reduction in oscillatory systems
- Patent number 7,880,554
- Issue date Feb 1, 2011
- QUALCOMM Incorporated
- Ashwin Raghunathan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Dual-path current amplifier
- Patent number 7,724,092
- Issue date May 25, 2010
- Qualcomm, Incorporated
- Xiaohong Quan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Multi-channel detector readout method and integrated circuit
- Patent number 7,148,460
- Issue date Dec 12, 2006
- The Regents of the University of California
- William W. Moses
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Multi-channel detector readout method and integrated circuit
- Patent number 6,737,627
- Issue date May 18, 2004
- The Regents of the University of California
- William W. Moses
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
Robust Transistor Circuitry
- Publication number 20240339998
- Publication date Oct 10, 2024
- QUALCOMM Incorporated
- Yi-Hung Tseng
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
HIGH GAIN LOW POWER PHASE DETECTOR AND LOOP FILTER FOR PHASE LOCK L...
- Publication number 20240213990
- Publication date Jun 27, 2024
- QUALCOMM Incorporated
- Sungmin OCK
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Robust Transistor Circuitry
- Publication number 20230107547
- Publication date Apr 6, 2023
- QUALCOMM Incorporated
- Yi-Hung Tseng
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
Robust Circuitry for Passive Fundamental Components
- Publication number 20230098996
- Publication date Mar 30, 2023
- QUALCOMM Incorporated
- Yi-Hung Tseng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CLOCK SCREENING WITH PROGRAMMABLE COUNTER-BASED CLOCK INTERFACE AND...
- Publication number 20200083873
- Publication date Mar 12, 2020
- Qualcomm Incorporated
- Zhengzheng WU
- G04 - HOROLOGY
Information Patent Application
CLOCK SCREENING WITH PROGRAMMABLE COUNTER-BASED CLOCK INTERFACE AND...
- Publication number 20190268010
- Publication date Aug 29, 2019
- QUALCOMM Incorporated
- Zhengzheng Wu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PROCESS-INVARIANT RESISTOR AND CAPACITOR PAIR
- Publication number 20190089030
- Publication date Mar 21, 2019
- QUALCOMM Incorporated
- Chao Song
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Circuits and Methods Providing Clock Frequency Adjustment in Respon...
- Publication number 20170005665
- Publication date Jan 5, 2017
- QUALCOMM Incorporated
- Ashok Swaminathan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
FAST FREQUENCY THROTTLING AND RE-LOCKING TECHNIQUE FOR PHASE-LOCKED...
- Publication number 20160065224
- Publication date Mar 3, 2016
- QUALCOMM Incorporated
- Ian Andrew GALTON
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
LOW LATENCY SYNCHRONIZATION SCHEME FOR MESOCHRONOUS DDR SYSTEM
- Publication number 20150340078
- Publication date Nov 26, 2015
- QUALCOMM Incorporated
- Edwin Jose
- G11 - INFORMATION STORAGE
Information Patent Application
LOW LATENCY SYNCHRONIZATION SCHEME FOR MESOCHRONOUS DDR SYSTEM
- Publication number 20140347941
- Publication date Nov 27, 2014
- QUALCOMM Incorporated
- Edwin Jose
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DIGITALLY ASSISTED REGULATION FOR AN INTEGRATED CAPLESS LOW-DROPOUT...
- Publication number 20140266103
- Publication date Sep 18, 2014
- QUALCOMM Incorporated
- Yuhe Wang
- G05 - CONTROLLING REGULATING
Information Patent Application
TEMPERATURE-INDEPENDENT OSCILLATORS AND DELAY ELEMENTS
- Publication number 20130342256
- Publication date Dec 26, 2013
- Qualcomm Incorporated
- Sameer Wadhwa
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
CIRCUIT FOR DETECTING A VOLTAGE CHANGE USING A TIME-TO-DIGITAL CONV...
- Publication number 20130214831
- Publication date Aug 22, 2013
- QUALCOMM Incorporated
- Sang Wook Park
- G01 - MEASURING TESTING
Information Patent Application
INJECTION-LOCKING A SLAVE OSCILLATOR TO A MASTER OSCILLATOR WITH NO...
- Publication number 20130033331
- Publication date Feb 7, 2013
- QUALCOMM Incorporated
- Ashwin RAGHUNATHAN
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SUPPLY-REGULATED VCO ARCHITECTURE
- Publication number 20120256693
- Publication date Oct 11, 2012
- QUALCOMM Incorporated
- Ashwin Raghunathan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PLL CHARGE PUMP WITH REDUCED COUPLING TO BIAS NODES
- Publication number 20110254615
- Publication date Oct 20, 2011
- QUALCOMM Incorporated
- Ashwin Raghunathan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Recalibration Systems and Techniques for Electronic Memory Applicat...
- Publication number 20110211404
- Publication date Sep 1, 2011
- QUALCOMM Incorporated
- Ashwin Raghunathan
- G11 - INFORMATION STORAGE
Information Patent Application
DUTY CYCLE CORRECTION CIRCUITRY
- Publication number 20110090940
- Publication date Apr 21, 2011
- QUALCOMM Incorporated
- Sameer Wadhwa
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Supply-Regulated Phase-Locked Loop (PLL) and Method of Using
- Publication number 20100271140
- Publication date Oct 28, 2010
- QUALCOMM Incorporated
- Ashwin Raghunathan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PERIODIC TIMING JIPERIODIC TIMING JITTER REDUCTION IN OSCILLATORY S...
- Publication number 20100194471
- Publication date Aug 5, 2010
- QUALCOMM Incorporated
- Ashwin Raghunathan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
TECHNIQUES FOR MINIMIZING CONTROL VOLTAGE RIPPLE DUE TO CHARGE PUMP...
- Publication number 20100117700
- Publication date May 13, 2010
- QUALCOMM Incorporated
- Ashwin Raghunathan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
TECHNIQUES FOR MINIMIZING CONTROL VOLTAGE NOISE DUE TO CHARGE PUMP...
- Publication number 20100117701
- Publication date May 13, 2010
- QUALCOMM Incorporated
- Ashwin Raghunathan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PROGRAMMABLE DELAY CIRCUIT WITH INTEGER AND FRACTIONAL TIME RESOLUTION
- Publication number 20090160519
- Publication date Jun 25, 2009
- QUALCOMM Incorporated
- Mustafa Keskin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DUAL-PATH CURRENT AMPLIFIER
- Publication number 20090091393
- Publication date Apr 9, 2009
- QUALCOMM Incorporated
- Xiaohong Quan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DELAY CIRCUITS MATCHING DELAYS OF SYNCHRONOUS CIRCUITS
- Publication number 20090079483
- Publication date Mar 26, 2009
- QUALCOMM Incorporated
- Mustafa Keskin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Current-mode gain-splitting dual-path VCO
- Publication number 20070159262
- Publication date Jul 12, 2007
- Xiaohong Quan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Multi-channel detector readout method and integrated circuit
- Publication number 20040251400
- Publication date Dec 16, 2004
- William W. Moses
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Multi-channel detector readout method and integrated circuit
- Publication number 20020074504
- Publication date Jun 20, 2002
- The Regents of the University of California.
- William W. Moses
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Marzio Pedrali-Noy

Person

Patents Grantslast 30 patents

Robust circuitry for passive fundamental components

Robust transistor circuitry

High gain low power phase detector and loop filter for phase lock l...

Clock screening with programmable counter-based clock interface and...

Process-invariant resistor and capacitor pair

Clock screening with programmable counter-based clock interface and...

Circuits and methods providing clock frequency adjustment in respon...

Fast frequency throttling and re-locking technique for phase-locked...

Low latency synchronization scheme for mesochronous DDR system

Low latency synchronization scheme for mesochronous DDR system

Temperature-independent oscillators and delay elements

Circuit for detecting a voltage change using a time-to-digital conv...

Injection-locking a slave oscillator to a master oscillator with no...

Duty cycle correction circuitry

Supply-regulated VCO architecture

PLL charge pump with reduced coupling to bias nodes

Techniques for minimizing control voltage noise due to charge pump...

Recalibration systems and techniques for electronic memory applicat...

Current-mode gain-splitting dual-path VCO

Programmable delay circuit with integer and fractional time resolution

Supply-regulated phase-locked loop (PLL) and method of using

Delay circuits matching delays of synchronous circuits

Techniques for minimizing control voltage ripple due to charge pump...

Periodic timing jitter reduction in oscillatory systems

Dual-path current amplifier

Multi-channel detector readout method and integrated circuit

Multi-channel detector readout method and integrated circuit

Patents Applicationslast 30 patents

Robust Transistor Circuitry

HIGH GAIN LOW POWER PHASE DETECTOR AND LOOP FILTER FOR PHASE LOCK L...

Robust Transistor Circuitry

Robust Circuitry for Passive Fundamental Components

CLOCK SCREENING WITH PROGRAMMABLE COUNTER-BASED CLOCK INTERFACE AND...

CLOCK SCREENING WITH PROGRAMMABLE COUNTER-BASED CLOCK INTERFACE AND...

PROCESS-INVARIANT RESISTOR AND CAPACITOR PAIR

Circuits and Methods Providing Clock Frequency Adjustment in Respon...

FAST FREQUENCY THROTTLING AND RE-LOCKING TECHNIQUE FOR PHASE-LOCKED...

LOW LATENCY SYNCHRONIZATION SCHEME FOR MESOCHRONOUS DDR SYSTEM

LOW LATENCY SYNCHRONIZATION SCHEME FOR MESOCHRONOUS DDR SYSTEM

DIGITALLY ASSISTED REGULATION FOR AN INTEGRATED CAPLESS LOW-DROPOUT...

TEMPERATURE-INDEPENDENT OSCILLATORS AND DELAY ELEMENTS

CIRCUIT FOR DETECTING A VOLTAGE CHANGE USING A TIME-TO-DIGITAL CONV...

INJECTION-LOCKING A SLAVE OSCILLATOR TO A MASTER OSCILLATOR WITH NO...

SUPPLY-REGULATED VCO ARCHITECTURE

PLL CHARGE PUMP WITH REDUCED COUPLING TO BIAS NODES

Recalibration Systems and Techniques for Electronic Memory Applicat...

DUTY CYCLE CORRECTION CIRCUITRY

Supply-Regulated Phase-Locked Loop (PLL) and Method of Using

PERIODIC TIMING JIPERIODIC TIMING JITTER REDUCTION IN OSCILLATORY S...

TECHNIQUES FOR MINIMIZING CONTROL VOLTAGE RIPPLE DUE TO CHARGE PUMP...

TECHNIQUES FOR MINIMIZING CONTROL VOLTAGE NOISE DUE TO CHARGE PUMP...

PROGRAMMABLE DELAY CIRCUIT WITH INTEGER AND FRACTIONAL TIME RESOLUTION

DUAL-PATH CURRENT AMPLIFIER

DELAY CIRCUITS MATCHING DELAYS OF SYNCHRONOUS CIRCUITS

Current-mode gain-splitting dual-path VCO

Multi-channel detector readout method and integrated circuit

Multi-channel detector readout method and integrated circuit