Mauro Luigi Sali

Person

Milan, IT

People

Patents Grantslast 30 patents

Information Patent Grant
Memory system tester using test pad real time monitoring
- Patent number 11,763,908
- Issue date Sep 19, 2023
- Micron Technology, Inc.
- Andrea Vigilante
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adjustable NAND write performance
- Patent number 11,526,277
- Issue date Dec 13, 2022
- Micron Technology, Inc.
- Giuseppe Cariello
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory system tester using test pad real time monitoring
- Patent number 11,211,136
- Issue date Dec 28, 2021
- Micron Technology, Inc.
- Andrea Vigilante
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adjustable NAND write performance
- Patent number 10,901,622
- Issue date Jan 26, 2021
- Micron Technology, Inc.
- Giuseppe Cariello
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flash memory device with improved management of protection information
- Patent number 7,761,675
- Issue date Jul 20, 2010
- Francesco Mastroianni
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Nonvolatile memory device with simultaneous read/write
- Patent number 6,950,337
- Issue date Sep 27, 2005
- STMicroelectronics S.r.l.
- Andrea Bellini
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory with functional capability of simultaneous modi...
- Patent number 6,912,598
- Issue date Jun 28, 2005
- STMicroelectrics S.r.l.
- Lorenzo Bedarida
- G11 - INFORMATION STORAGE
Information Patent Grant
Test structure for the measurement of contact to gate distance in n...
- Patent number 6,903,995
- Issue date Jun 7, 2005
- STMicroelectronics S.r.l.
- Emilio Camerlenghi
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory device with burst mode reading and correspondin...
- Patent number 6,854,040
- Issue date Feb 8, 2005
- STMicroelectronics S.r.l.
- Simone Bartoli
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory with a charge pump with regulated voltage
- Patent number 6,480,436
- Issue date Nov 12, 2002
- STMicroelectronics S.r.l.
- Emanuele Confalonieri
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory with functional capability of burst mode read a...
- Patent number 6,442,068
- Issue date Aug 27, 2002
- STMicroelectronics S.r.l.
- Simone Bartoli
- G11 - INFORMATION STORAGE
Information Patent Grant
Sectored semiconductor memory device with configurable memory secto...
- Patent number 6,401,164
- Issue date Jun 4, 2002
- STMicroelectronics S.r.l.
- Simone Bartoli
- G11 - INFORMATION STORAGE
Information Patent Grant
Architecture for handling internal voltages in a non-volatile memor...
- Patent number 6,385,107
- Issue date May 7, 2002
- STMicroelectronics S.r.l.
- Lorenzo Bedarida
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for reading data from a non-volatile memory device with auto...
- Patent number 6,349,059
- Issue date Feb 19, 2002
- STMicroelectronics S.r.l.
- Simone Bartoli
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device with selectable pads
- Patent number 6,339,551
- Issue date Jan 15, 2002
- STMicroelectronics S.r.l.
- Simone Bartoli
- G11 - INFORMATION STORAGE
Information Patent Grant
Row decoding circuit for a semiconductor non-volatile electrically...
- Patent number 6,320,792
- Issue date Nov 20, 2001
- SGS-Thomson Microelectronics S.r.l.
- Fabio Tassan Caser
- G11 - INFORMATION STORAGE
Information Patent Grant
Row decoding circuit for a semiconductor non-volatile electrically...
- Patent number 6,137,725
- Issue date Oct 24, 2000
- SGS Thomson Microelectronics S.r.l.
- Fabio Tassan Caser
- G11 - INFORMATION STORAGE
Information Patent Grant
Flash EEPROM with controlled discharge time of the word lines and s...
- Patent number 5,999,456
- Issue date Dec 7, 1999
- STMicroelectronics S.r.l.
- Mauro Sali
- G11 - INFORMATION STORAGE
Information Patent Grant
CMOS twin-tub negative voltage switching architecture
- Patent number 5,994,948
- Issue date Nov 30, 1999
- SGS Thomson Microelectronics S.r.l.
- Simone Bartoli
- G11 - INFORMATION STORAGE
Information Patent Grant
Stacked Charge pump circuit
- Patent number 5,926,059
- Issue date Jul 20, 1999
- SGS Thomson Microelectronics S.r.l.
- Francesco M. Brani
- G11 - INFORMATION STORAGE
Information Patent Grant
Negative word line voltage regulation circuit for electrically eras...
- Patent number 5,920,505
- Issue date Jul 6, 1999
- STMicroelectronics, S.r.l.
- Mauro Sali
- G11 - INFORMATION STORAGE
Information Patent Grant
Row decoding circuit for semiconductor non-volatile electrically pr...
- Patent number 5,848,013
- Issue date Dec 8, 1998
- SGS Thomson Microelectronics S.r.l.
- Fabio Tassan Caser
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for setting the threshold voltage of a reference memory cell
- Patent number 5,784,314
- Issue date Jul 21, 1998
- SGS Thomson Microelectronics S.r.l.
- Mauro Sali
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallel programming method of memory words and corresponding circuit
- Patent number 5,781,474
- Issue date Jul 14, 1998
- SGS-Thomson Microelectronics, S.r.l.
- Mauro Sali
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and programming device for detecting an error in a memory
- Patent number 5,724,290
- Issue date Mar 3, 1998
- SGS Thomson Microelectronics S.r.l.
- Mauro Sali
- G11 - INFORMATION STORAGE
Information Patent Grant
Flash EEPROM with controlled discharge time of the word lines and s...
- Patent number 5,719,807
- Issue date Feb 17, 1998
- SGS Thomson Microelectronics S.r.l.
- Mauro Sali
- G11 - INFORMATION STORAGE
Information Patent Grant
Negative word line voltage regulation circuit for electrically eras...
- Patent number 5,659,502
- Issue date Aug 19, 1997
- SGS Thomson Microelectronics S.r.l.
- Mauro Sali
- G11 - INFORMATION STORAGE
Information Patent Grant
Flash-EEPROM memory array and method for biasing the same
- Patent number 5,638,327
- Issue date Jun 10, 1997
- SGS Thomson Microelectronics S.r.l.
- Marco Dallabora
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit for covering initial conditions when starting-up an integra...
- Patent number 5,612,641
- Issue date Mar 18, 1997
- SGS Thomson Microelectronics S.r.l.
- Mauro L. Sali
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High-resolution digital filter
- Patent number 5,563,816
- Issue date Oct 8, 1996
- SGS Thomson Microelectronics S.r.l.
- Carla Golla
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
WRITE BUFFER CONTROL IN MANAGED MEMORY SYSTEM
- Publication number 20230143181
- Publication date May 11, 2023
- Micron Technology, Inc.
- Hua Tan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM TESTER USING TEST PAD REAL TIME MONITORING
- Publication number 20220101938
- Publication date Mar 31, 2022
- Micron Technology, Inc.
- Andrea Vigilante
- G11 - INFORMATION STORAGE
Information Patent Application
ADJUSTABLE NAND WRITE PERFORMANCE
- Publication number 20210141530
- Publication date May 13, 2021
- Micron Technology, Inc.
- Giuseppe Cariello
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM TESTER USING TEST PAD REAL TIME MONITORING
- Publication number 20200411129
- Publication date Dec 31, 2020
- Micron Technology, Inc.
- Andrea Vigilante
- G11 - INFORMATION STORAGE
Information Patent Application
ADJUSTABLE NAND WRITE PERFORMANCE
- Publication number 20200210067
- Publication date Jul 2, 2020
- Giuseppe Cariello
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Flash memory device with improved management of protection information
- Publication number 20070016735
- Publication date Jan 18, 2007
- STMicroelectronics S.r. I.
- Francesco Mastroianni
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Nonvolatile memory device with simultaneous read/write
- Publication number 20040156235
- Publication date Aug 12, 2004
- STMicroelectronics S.r. I.
- Andrea Bellini
- G11 - INFORMATION STORAGE
Information Patent Application
Test structure for the measurement of contact to gate distance in n...
- Publication number 20030235097
- Publication date Dec 25, 2003
- STMicroelectronics S.r.I.
- Emilio Camerlenghi
- G11 - INFORMATION STORAGE
Information Patent Application
Method and device for reducing average access time of a non-volatil...
- Publication number 20020136069
- Publication date Sep 26, 2002
- STMicroelectronics S.r.l.
- Riccardo Riva Reggiori
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Non-volatile memory with a charge pump with regulated voltage
- Publication number 20020018390
- Publication date Feb 14, 2002
- STMicroelectronics S.r. I.
- Emanuele Confalonieri
- G11 - INFORMATION STORAGE

Mauro Luigi Sali

Person

Patents Grantslast 30 patents

Memory system tester using test pad real time monitoring

Adjustable NAND write performance

Memory system tester using test pad real time monitoring

Adjustable NAND write performance

Flash memory device with improved management of protection information

Nonvolatile memory device with simultaneous read/write

Non-volatile memory with functional capability of simultaneous modi...

Test structure for the measurement of contact to gate distance in n...

Non-volatile memory device with burst mode reading and correspondin...

Non-volatile memory with a charge pump with regulated voltage

Non-volatile memory with functional capability of burst mode read a...

Sectored semiconductor memory device with configurable memory secto...

Architecture for handling internal voltages in a non-volatile memor...

Method for reading data from a non-volatile memory device with auto...

Semiconductor device with selectable pads

Row decoding circuit for a semiconductor non-volatile electrically...

Row decoding circuit for a semiconductor non-volatile electrically...

Flash EEPROM with controlled discharge time of the word lines and s...

CMOS twin-tub negative voltage switching architecture

Stacked Charge pump circuit

Negative word line voltage regulation circuit for electrically eras...

Row decoding circuit for semiconductor non-volatile electrically pr...

Method for setting the threshold voltage of a reference memory cell

Parallel programming method of memory words and corresponding circuit

Method and programming device for detecting an error in a memory

Flash EEPROM with controlled discharge time of the word lines and s...

Negative word line voltage regulation circuit for electrically eras...

Flash-EEPROM memory array and method for biasing the same

Circuit for covering initial conditions when starting-up an integra...

High-resolution digital filter

Patents Applicationslast 30 patents

WRITE BUFFER CONTROL IN MANAGED MEMORY SYSTEM

MEMORY SYSTEM TESTER USING TEST PAD REAL TIME MONITORING

ADJUSTABLE NAND WRITE PERFORMANCE

MEMORY SYSTEM TESTER USING TEST PAD REAL TIME MONITORING

ADJUSTABLE NAND WRITE PERFORMANCE

Flash memory device with improved management of protection information

Nonvolatile memory device with simultaneous read/write

Test structure for the measurement of contact to gate distance in n...

Method and device for reducing average access time of a non-volatil...

Non-volatile memory with a charge pump with regulated voltage