Mauro Pagliato

Person

Agrate Brianza (MB), IT

People

Patents Grantslast 30 patents

Information Patent Grant
Latch architecture
- Patent number 11,258,434
- Issue date Feb 22, 2022
- SK Hynix Inc.
- Marino Laterza
- G11 - INFORMATION STORAGE
Information Patent Grant
DMA architecture for NAND-type flash memory
- Patent number 8,724,361
- Issue date May 13, 2014
- Mauro Pagliato
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device in particular extra array configured therein for conf...
- Patent number 8,599,615
- Issue date Dec 3, 2013
- Elpida Memory, Inc.
- Simone Bartoli
- G11 - INFORMATION STORAGE
Information Patent Grant
Mask-write apparatus for a SRAM cell
- Patent number 8,391,086
- Issue date Mar 5, 2013
- Elpida Memory, Inc.
- Giulio Martinozzi
- G11 - INFORMATION STORAGE
Information Patent Grant
High voltage generator of the DAC-controlled type
- Patent number 7,706,160
- Issue date Apr 27, 2010
- Marco Fontana
- G11 - INFORMATION STORAGE
Information Patent Grant
Sense amplifier with equalizer
- Patent number 7,136,305
- Issue date Nov 14, 2006
- STMicroelectronics S.r.l.
- Mauro Pagliato
- G11 - INFORMATION STORAGE
Information Patent Grant
Parallel sense amplifier with mirroring of the current to be measur...
- Patent number 7,075,844
- Issue date Jul 11, 2006
- STMicroelectronics S.r.l.
- Mauro Pagliato
- G11 - INFORMATION STORAGE
Information Patent Grant
Reading circuit and method for a multilevel non-volatile memory
- Patent number 6,657,895
- Issue date Dec 2, 2003
- STMicroelectronics S.r.l.
- Mauro Pagliato
- G11 - INFORMATION STORAGE
Information Patent Grant
High-efficiency power charge pump supplying high DC output currents
- Patent number 6,605,985
- Issue date Aug 12, 2003
- STMicroelectronics S.r.l.
- Mauro Pagliato
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER

Patents Applicationslast 30 patents

Information Patent Application
METHOD, DEVICE, AND SYSTEM INCLUDING CONFIGURABLE BIT-PER-CELL CAPA...
- Publication number 20140173173
- Publication date Jun 19, 2014
- Elpida Memory, Inc.
- Luca Battu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DMA ARCHITECTURE FOR NAND-TYPE FLASH MEMORY
- Publication number 20130201744
- Publication date Aug 8, 2013
- ELPIDA MEMORY, INC.
- Mauro Pagliato
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE IN PARTICULAR EXTRA ARRAY CONFIGURED THEREIN FOR CONF...
- Publication number 20130094295
- Publication date Apr 18, 2013
- Elpida Memory, Inc.
- Simone Bartoli
- G11 - INFORMATION STORAGE
Information Patent Application
MASK-WRITE APPARATUS FOR A SRAM CELL
- Publication number 20120224439
- Publication date Sep 6, 2012
- Elpida Memory, Inc.
- Giulio Martinozzi
- G11 - INFORMATION STORAGE
Information Patent Application
HIGH VOLTAGE GENERATOR OF THE DAC-CONTROLLED TYPE
- Publication number 20080037301
- Publication date Feb 14, 2008
- STMicroelectronics S.r.l.
- Marco Fontana
- G11 - INFORMATION STORAGE
Information Patent Application
Sense amplifier
- Publication number 20050063236
- Publication date Mar 24, 2005
- STMicroelectronics S.r. I.
- Mauro Pagliato
- G11 - INFORMATION STORAGE
Information Patent Application
Parallel sense amplifier with mirroring of the current to be measur...
- Publication number 20040228179
- Publication date Nov 18, 2004
- STMicroelectronics S.r.l.
- Mauro Pagliato
- G11 - INFORMATION STORAGE
Information Patent Application
High-efficiency power charge pump supplying high DC output currents
- Publication number 20030034827
- Publication date Feb 20, 2003
- STMicroelectronics S.r.l.
- Mauro Pagliato
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
Reading circuit and method for a multilevel non-volatile memory
- Publication number 20020186592
- Publication date Dec 12, 2002
- STMicroelectronics S.r. I.
- Mauro Pagliato
- G11 - INFORMATION STORAGE

Mauro Pagliato

Person

Patents Grantslast 30 patents

Latch architecture

DMA architecture for NAND-type flash memory

Memory device in particular extra array configured therein for conf...

Mask-write apparatus for a SRAM cell

High voltage generator of the DAC-controlled type

Sense amplifier with equalizer

Parallel sense amplifier with mirroring of the current to be measur...

Reading circuit and method for a multilevel non-volatile memory

High-efficiency power charge pump supplying high DC output currents

Patents Applicationslast 30 patents

METHOD, DEVICE, AND SYSTEM INCLUDING CONFIGURABLE BIT-PER-CELL CAPA...

DMA ARCHITECTURE FOR NAND-TYPE FLASH MEMORY

MEMORY DEVICE IN PARTICULAR EXTRA ARRAY CONFIGURED THEREIN FOR CONF...

MASK-WRITE APPARATUS FOR A SRAM CELL

HIGH VOLTAGE GENERATOR OF THE DAC-CONTROLLED TYPE

Sense amplifier

Parallel sense amplifier with mirroring of the current to be measur...

High-efficiency power charge pump supplying high DC output currents

Reading circuit and method for a multilevel non-volatile memory