Michael Ignatowski

Person

Red Hook, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Multiple-core processor supporting multiple instruction set archite...
- Patent number 8,806,182
- Issue date Aug 12, 2014
- Microsoft Corporation
- James Walter Rymarczyk
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Semiconductor chip stacking for redundancy and yield improvement
- Patent number 8,686,559
- Issue date Apr 1, 2014
- International Business Machines Corporation
- Kerry Bernstein
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor chip stacking for redundancy and yield improvement
- Patent number 8,597,960
- Issue date Dec 3, 2013
- International Business Machines Corporation
- Kerry Bernstein
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Systems and methods for masking latency of memory reorganization wo...
- Patent number 8,122,216
- Issue date Feb 21, 2012
- International Business Machines Corporation
- David Michael Daly
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple-core processor supporting multiple instruction set archite...
- Patent number 8,028,290
- Issue date Sep 27, 2011
- International Business Machines Corporation
- James Walter Rymarczyk
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Apparatus for modeling queueing systems with highly variable traffi...
- Patent number 7,668,096
- Issue date Feb 23, 2010
- International Business Machines Corporation
- Michael Ignatowski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
System and computer program product for dynamically managing power...
- Patent number 7,647,519
- Issue date Jan 12, 2010
- International Business Machines Corporation
- Thomas J. Heller, Jr.
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiprocessor system with dynamic cache coherency regions
- Patent number 7,484,043
- Issue date Jan 27, 2009
- International Business Machines Corporation
- Thomas J. Heller, Jr.
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for dynamically managing power in microprocessor chips accor...
- Patent number 7,401,240
- Issue date Jul 15, 2008
- International Business Machines Corporation
- Thomas J. Heller, Jr.
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for modeling queueing systems with highly vari...
- Patent number 7,376,083
- Issue date May 20, 2008
- International Business Machines Corporation
- Michael Ignatowski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method, system and article of manufacture for an analytic modeling...
- Patent number 7,099,816
- Issue date Aug 29, 2006
- International Business Machines Corporation
- Michael Ignatowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system of an integrated simulation tool using business p...
- Patent number 6,768,968
- Issue date Jul 27, 2004
- International Business Machines Corporation
- Michael Ignatowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scaleable shared-memory multi-processor computer system having repe...
- Patent number 6,457,100
- Issue date Sep 24, 2002
- International Business Machines Corporation
- Michael Ignatowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated processing and L2 DRAM cache
- Patent number 5,895,487
- Issue date Apr 20, 1999
- International Business Machines Corporation
- William Todd Boyd
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-port multiple-simultaneous-access DRAM chip
- Patent number 5,875,470
- Issue date Feb 23, 1999
- International Business Machines Corporation
- Jeffrey Harris Dreibelbis
- G11 - INFORMATION STORAGE
Information Patent Grant
Coherence control by data invalidation in selected processor caches...
- Patent number 5,265,232
- Issue date Nov 23, 1993
- International Business Machines Corporation
- Patrick M. Gannon
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
SEMICONDUCTOR CHIP STACKING FOR REDUNDANCY AND YIELD IMPROVEMENT
- Publication number 20120326333
- Publication date Dec 27, 2012
- International Business Machines Corporation
- Kerry Bernstein
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTIPLE-CORE PROCESSOR SUPPORTING MULTIPLE INSTRUCTION SET ARCHITE...
- Publication number 20110271079
- Publication date Nov 3, 2011
- International Business Machines Corporation
- James Walter Rymarczyk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR CHIP STACKING FOR REDUNDANCY AND YIELD IMPROVEMENT
- Publication number 20090224388
- Publication date Sep 10, 2009
- International Business Machines Corporation
- Kerry Bernstein
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
System and Computer Program Product for Dynamically Managing Power...
- Publication number 20080229128
- Publication date Sep 18, 2008
- International Business Machines Corporation
- Thomas J. Heller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS FOR MODELING QUEUEING SYSTEMS WITH HIGHLY VARIABLE TRAFFI...
- Publication number 20080151923
- Publication date Jun 26, 2008
- International Business Machines Corporation
- Michael Ignatowski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Multiprocessor System With Dynamic Cache Coherency Regions
- Publication number 20080147988
- Publication date Jun 19, 2008
- International Business Machines Corporation
- Thomas J. Heller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE-CORE PROCESSOR SUPPORTING MULTIPLE INSTRUCTION SET ARCHITE...
- Publication number 20080059769
- Publication date Mar 6, 2008
- James Walter Rymarczyk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Systems and methods for masking latency of memory reorganization wo...
- Publication number 20080059728
- Publication date Mar 6, 2008
- David Michael Daly
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, system, and computer program product for dynamically managi...
- Publication number 20050283679
- Publication date Dec 22, 2005
- International Business Machines Corporation
- Thomas J. Heller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and method for modeling queueing systems with highly vari...
- Publication number 20050122987
- Publication date Jun 9, 2005
- Michael Ignatowski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Multiprocessor system with dynamic cache coherency regions
- Publication number 20040268044
- Publication date Dec 30, 2004
- International Business Machines Corporation
- Thomas J. Heller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, system and article of manufacture for an analytic modeling...
- Publication number 20030233220
- Publication date Dec 18, 2003
- International Business Machines Corporation
- Michael Ignatowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and system of an integrated simulation tool using business p...
- Publication number 20030200059
- Publication date Oct 23, 2003
- International Business Machines Corporation
- Michael Ignatowski
- G06 - COMPUTING CALCULATING COUNTING

Michael Ignatowski

Person

Patents Grantslast 30 patents

Multiple-core processor supporting multiple instruction set archite...

Semiconductor chip stacking for redundancy and yield improvement

Semiconductor chip stacking for redundancy and yield improvement

Systems and methods for masking latency of memory reorganization wo...

Multiple-core processor supporting multiple instruction set archite...

Apparatus for modeling queueing systems with highly variable traffi...

System and computer program product for dynamically managing power...

Multiprocessor system with dynamic cache coherency regions

Method for dynamically managing power in microprocessor chips accor...

Apparatus and method for modeling queueing systems with highly vari...

Method, system and article of manufacture for an analytic modeling...

Method and system of an integrated simulation tool using business p...

Scaleable shared-memory multi-processor computer system having repe...

Integrated processing and L2 DRAM cache

Multi-port multiple-simultaneous-access DRAM chip

Coherence control by data invalidation in selected processor caches...

Patents Applicationslast 30 patents

SEMICONDUCTOR CHIP STACKING FOR REDUNDANCY AND YIELD IMPROVEMENT

MULTIPLE-CORE PROCESSOR SUPPORTING MULTIPLE INSTRUCTION SET ARCHITE...

SEMICONDUCTOR CHIP STACKING FOR REDUNDANCY AND YIELD IMPROVEMENT

System and Computer Program Product for Dynamically Managing Power...

APPARATUS FOR MODELING QUEUEING SYSTEMS WITH HIGHLY VARIABLE TRAFFI...

Multiprocessor System With Dynamic Cache Coherency Regions

MULTIPLE-CORE PROCESSOR SUPPORTING MULTIPLE INSTRUCTION SET ARCHITE...

Systems and methods for masking latency of memory reorganization wo...

Method, system, and computer program product for dynamically managi...

Apparatus and method for modeling queueing systems with highly vari...

Multiprocessor system with dynamic cache coherency regions

Method, system and article of manufacture for an analytic modeling...

Method and system of an integrated simulation tool using business p...