Michael Osborn

Person

Santa Clara, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Techniques for reducing the overhead of providing responses in a co...
- Patent number 11,038,800
- Issue date Jun 15, 2021
- NVIDIA Corporation
- Glenn Dearth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Devices and methods for interconnecting server nodes
- Patent number 10,248,315
- Issue date Apr 2, 2019
- Advanced Micro Devices, Inc.
- David E. Mayhew
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
System and method for early packet header verification
- Patent number 10,200,154
- Issue date Feb 5, 2019
- NVIDIA Corporation
- Stephen D. Glaser
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Lane-striped computation of packet CRC to maintain burst error prop...
- Patent number 10,097,203
- Issue date Oct 9, 2018
- NVIDIA Corporation
- Eric Tyson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for enabling replay using a packetized link protocol
- Patent number 9,954,984
- Issue date Apr 24, 2018
- NVIDIA Corporation
- Dennis Ma
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Producer/consumer remote synchronization
- Patent number 9,858,221
- Issue date Jan 2, 2018
- NVIDIA Corporation
- Mike Osborn
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for early packet header verification
- Patent number 9,720,768
- Issue date Aug 1, 2017
- NVIDIA Corporation
- Stephen D. Glaser
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Using temperature margin to balance performance with power allocation
- Patent number 9,710,034
- Issue date Jul 18, 2017
- Advanced Micro Devices, Inc.
- Samuel D. Naffziger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Propagation simulation buffer for clock domain crossing
- Patent number 9,621,143
- Issue date Apr 11, 2017
- Advanced Micro Devices, Inc.
- Michael J. Osborn
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Channel rotating error correction code
- Patent number 9,251,001
- Issue date Feb 2, 2016
- Advanced Micro Devices, Inc.
- Michael J. Osborn
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Voltage regulator dynamically determining whether requested power t...
- Patent number 9,213,381
- Issue date Dec 15, 2015
- ATI Technologies ULC
- Michael J. Osborn
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for sharing devices in a virtualization environ...
- Patent number 9,154,451
- Issue date Oct 6, 2015
- Advanced Micro Devices, Inc.
- Anton Chernoff
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Devices and methods for interconnecting server nodes
- Patent number 9,137,173
- Issue date Sep 15, 2015
- Advanced Micro Devices, Inc.
- David E. Mayhew
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Channel rotating error correction code
- Patent number 9,069,698
- Issue date Jun 30, 2015
- Advanced Micro Devices, Inc.
- Michael J. Osborn
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Using temperature margin to balance performance with power allocation
- Patent number 9,052,885
- Issue date Jun 9, 2015
- Advanced Micro Devices, Inc.
- Samuel D. Naffziger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Voltage adjustment based on load line and power estimates
- Patent number 9,021,276
- Issue date Apr 28, 2015
- ATI Technologies ULC
- Michael J. Osborn
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic mapping of logical cores
- Patent number 8,910,177
- Issue date Dec 9, 2014
- Advanced Micro Devices, Inc.
- Michael J. Osborn
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data flow processing in a network environment
- Patent number 8,875,256
- Issue date Oct 28, 2014
- Advanced Micro Devices, Inc.
- Mark Hummel
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Server node interconnect devices and methods
- Patent number 8,868,672
- Issue date Oct 21, 2014
- Advanced Micro Devices, Inc.
- Mark Hummel
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Systems and methods for managing queues
- Patent number 8,825,927
- Issue date Sep 2, 2014
- Advanced Micro Devices, Inc.
- David E. Mayhew
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Systems and methods for input/output virtualization
- Patent number 8,806,025
- Issue date Aug 12, 2014
- Advanced Micro Devices, Inc.
- Mark Hummel
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Error detection in FIFO queues using signature bits
- Patent number 8,583,971
- Issue date Nov 12, 2013
- Advanced Micro Devices, Inc.
- Sajosh Janarthanam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Clock domain crossing buffer
- Patent number 8,584,067
- Issue date Nov 12, 2013
- Advanced Micro Devices, Inc.
- Michael J. Osborn
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Synchronization device and methods thereof
- Patent number 8,001,409
- Issue date Aug 16, 2011
- GlobalFoundries Inc.
- Michael J. Osborn
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data transfer device and method thereof
- Patent number 7,984,351
- Issue date Jul 19, 2011
- Advanced Micro Devices, Inc.
- Jonathan M. Owen
- G01 - MEASURING TESTING
Information Patent Grant
Low voltage differential receiver/transmitter and calibration metho...
- Patent number 6,448,815
- Issue date Sep 10, 2002
- API NetWorks, Inc.
- Gerald Talbot
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
NATIVE LINK ENCRYPTION
- Publication number 20240406154
- Publication date Dec 5, 2024
- NVIDIA Corporation
- Miriam Menes
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TECHNIQUES FOR REDUCING THE OVERHEAD OF PROVIDING RESPONSES IN A CO...
- Publication number 20210067449
- Publication date Mar 4, 2021
- NVIDIA Corporation
- Glenn Dearth
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SYSTEM AND METHOD FOR EARLY PACKET HEADER VERIFICATION
- Publication number 20170288815
- Publication date Oct 5, 2017
- NVIDIA Corporation
- Stephen D. Glaser
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
PRODUCER/CONSUMER REMOTE SYNCHRONIZATION
- Publication number 20170235690
- Publication date Aug 17, 2017
- NVIDIA Corporation
- Mike Osborn
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LANE-STRIPED COMPUTATION OF PACKET CRC TO MAINTAIN BURST ERROR PROP...
- Publication number 20170141794
- Publication date May 18, 2017
- NVIDIA Corporation
- Eric Tyson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR ENABLING REPLAY USING A PACKETIZED LINK PROTOCOL
- Publication number 20170111144
- Publication date Apr 20, 2017
- NVIDIA Corporation
- Dennis Ma
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SYSTEM AND METHOD FOR EARLY PACKET HEADER VERIFICATION
- Publication number 20170097867
- Publication date Apr 6, 2017
- NVIDIA Corporation
- Stephen D. Glaser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DEVICES AND METHODS FOR INTERCONNECTING SERVER NODES
- Publication number 20160004445
- Publication date Jan 7, 2016
- Advanced Micro Devices, Inc.
- David E. Mayhew
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CHANNEL ROTATING ERROR CORRECTION CODE
- Publication number 20150339192
- Publication date Nov 26, 2015
- Advanced Micro Devices, Inc.
- Michael J. Osborn
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
USING TEMPERATURE MARGIN TO BALANCE PERFORMANCE WITH POWER ALLOCATION
- Publication number 20150268707
- Publication date Sep 24, 2015
- Advanced Micro Devices, Inc.
- Samuel D. Naffziger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
USING TEMPERATURE MARGIN TO BALANCE PERFORMANCE WITH POWER ALLOCATION
- Publication number 20140181536
- Publication date Jun 26, 2014
- Advanced Micro Devices, Inc.
- Samuel D. Naffziger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA FLOW PROCESSING IN A NETWORK ENVIRONMENT
- Publication number 20140137215
- Publication date May 15, 2014
- Advanced Micro Devices, Inc.
- Mark Hummel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA TRANSFER SYSTEM AND METHOD
- Publication number 20140068139
- Publication date Mar 6, 2014
- Advanced Micro Devices, Inc.
- Michael J. Osborn
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR MANAGING QUEUES
- Publication number 20140068205
- Publication date Mar 6, 2014
- Advanced Micro Devices, Inc.
- David E. Mayhew
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CHANNEL ROTATING ERROR CORRECTION CODE
- Publication number 20140068373
- Publication date Mar 6, 2014
- Advanced Micro Devices, Inc.
- Michael J. Osborn
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE BASED MEMORY ALLOCATION SYSTEM WITH DIRECTLY CONNECTED MEMORY
- Publication number 20140068220
- Publication date Mar 6, 2014
- Advanced Micro Devices, Inc.
- Michael J. Osborn
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROPAGATION SIMULATION BUFFER
- Publication number 20140062555
- Publication date Mar 6, 2014
- Advanced Micro Devices, Inc.
- Michael J. Osborn
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR SHARING DEVICES IN A VIRTUALIZATION ENVIRON...
- Publication number 20140059160
- Publication date Feb 27, 2014
- Advanced Micro Devices, Inc.
- Anton Chernoff
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR INPUT/OUTPUT VIRTUALIZATION
- Publication number 20130346531
- Publication date Dec 26, 2013
- Advanced Micro Devices, Inc.
- Mark Hummel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DEVICES AND METHODS FOR INTERCONNECTING SERVER NODES
- Publication number 20130339466
- Publication date Dec 19, 2013
- Advanced Micro Devices, Inc.
- David E. Mayhew
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC LOAD STEP CALCULATION FOR LOAD LINE ADJUSTMENT
- Publication number 20130318372
- Publication date Nov 28, 2013
- Advanced Micro Devices, Inc.
- Michael J. Osborn
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SERVER NODE INTERCONNECT DEVICES AND METHODS
- Publication number 20130304841
- Publication date Nov 14, 2013
- Advanced Micro Devices, Inc.
- Mark Hummel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VOLTAGE ADJUSTMENT BASED ON LOAD LINE AND POWER ESTIMATES
- Publication number 20130297950
- Publication date Nov 7, 2013
- Advanced Micro Devices, Inc.,
- Michael J. Osborn
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC MAPPING OF LOGICAL CORES
- Publication number 20120266179
- Publication date Oct 18, 2012
- Michael J. Osborn
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR DETECTION IN FIFO QUEUES USING SIGNATURE BITS
- Publication number 20120166890
- Publication date Jun 28, 2012
- Advanced Micro Devices, Inc.
- Sajosh Janarthanam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CLOCK DOMAIN CROSSING BUFFER
- Publication number 20120110529
- Publication date May 3, 2012
- Michael J. Osborn
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA TRANSFER DEVICE AND METHOD THEREOF
- Publication number 20090259874
- Publication date Oct 15, 2009
- Advanced Micro Devices, Inc.
- Jonathan M. Owen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYNCHRONIZATION DEVICE AND METHODS THEREOF
- Publication number 20080288805
- Publication date Nov 20, 2008
- Advanced Micro Devices, Inc.
- Michael J. Osborn
- G06 - COMPUTING CALCULATING COUNTING

Michael Osborn

Person

Patents Grantslast 30 patents

Techniques for reducing the overhead of providing responses in a co...

Devices and methods for interconnecting server nodes

System and method for early packet header verification

Lane-striped computation of packet CRC to maintain burst error prop...

System and method for enabling replay using a packetized link protocol

Producer/consumer remote synchronization

System and method for early packet header verification

Using temperature margin to balance performance with power allocation

Propagation simulation buffer for clock domain crossing

Channel rotating error correction code

Voltage regulator dynamically determining whether requested power t...

Systems and methods for sharing devices in a virtualization environ...

Devices and methods for interconnecting server nodes

Channel rotating error correction code

Using temperature margin to balance performance with power allocation

Voltage adjustment based on load line and power estimates

Dynamic mapping of logical cores

Data flow processing in a network environment

Server node interconnect devices and methods

Systems and methods for managing queues

Systems and methods for input/output virtualization

Error detection in FIFO queues using signature bits

Clock domain crossing buffer

Synchronization device and methods thereof

Data transfer device and method thereof

Low voltage differential receiver/transmitter and calibration metho...

Patents Applicationslast 30 patents

NATIVE LINK ENCRYPTION

TECHNIQUES FOR REDUCING THE OVERHEAD OF PROVIDING RESPONSES IN A CO...

SYSTEM AND METHOD FOR EARLY PACKET HEADER VERIFICATION

PRODUCER/CONSUMER REMOTE SYNCHRONIZATION

LANE-STRIPED COMPUTATION OF PACKET CRC TO MAINTAIN BURST ERROR PROP...

SYSTEM AND METHOD FOR ENABLING REPLAY USING A PACKETIZED LINK PROTOCOL

SYSTEM AND METHOD FOR EARLY PACKET HEADER VERIFICATION

DEVICES AND METHODS FOR INTERCONNECTING SERVER NODES

CHANNEL ROTATING ERROR CORRECTION CODE

USING TEMPERATURE MARGIN TO BALANCE PERFORMANCE WITH POWER ALLOCATION

USING TEMPERATURE MARGIN TO BALANCE PERFORMANCE WITH POWER ALLOCATION

DATA FLOW PROCESSING IN A NETWORK ENVIRONMENT

DATA TRANSFER SYSTEM AND METHOD

SYSTEMS AND METHODS FOR MANAGING QUEUES

CHANNEL ROTATING ERROR CORRECTION CODE

HARDWARE BASED MEMORY ALLOCATION SYSTEM WITH DIRECTLY CONNECTED MEMORY

PROPAGATION SIMULATION BUFFER

SYSTEMS AND METHODS FOR SHARING DEVICES IN A VIRTUALIZATION ENVIRON...

SYSTEMS AND METHODS FOR INPUT/OUTPUT VIRTUALIZATION

DEVICES AND METHODS FOR INTERCONNECTING SERVER NODES

DYNAMIC LOAD STEP CALCULATION FOR LOAD LINE ADJUSTMENT

SERVER NODE INTERCONNECT DEVICES AND METHODS

VOLTAGE ADJUSTMENT BASED ON LOAD LINE AND POWER ESTIMATES

DYNAMIC MAPPING OF LOGICAL CORES

ERROR DETECTION IN FIFO QUEUES USING SIGNATURE BITS

CLOCK DOMAIN CROSSING BUFFER

DATA TRANSFER DEVICE AND METHOD THEREOF

SYNCHRONIZATION DEVICE AND METHODS THEREOF