Michael S. Alfano

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Creating interconnects between dies using a cross-over die and thro...
- Patent number 11,830,817
- Issue date Nov 28, 2023
- Advanced Micro Devices, Inc.
- Rahul Agarwal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interposer with identification system
- Patent number 10,290,606
- Issue date May 14, 2019
- Advanced Micro Devices, Inc.
- Michael Alfano
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interposer with beyond reticle field conductor pads
- Patent number 9,806,014
- Issue date Oct 31, 2017
- Advanced Micro Devices, Inc.
- Michael S. Alfano
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor workpiece with selective backside metallization
- Patent number 9,793,239
- Issue date Oct 17, 2017
- Advanced Micro Devices, Inc.
- Michael Z. Su
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Thermal management of stacked semiconductor chips with electrically...
- Patent number 8,704,353
- Issue date Apr 22, 2014
- Advanced Micro Devices, Inc.
- Michael Su
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Semiconductor Package with Integrated Capacitors
- Publication number 20250015019
- Publication date Jan 9, 2025
- Chipletz, Inc.
- Michael SU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Co-Packaging Assembly and Method for Attaching Photonic Dies/Module...
- Publication number 20240337799
- Publication date Oct 10, 2024
- Chipletz, Inc.
- Siddharth Ravichandran
- G02 - OPTICS
Information Patent Application
Low-Equivalent-Series-Resistance Capacitors with Solid-State Curren...
- Publication number 20240258041
- Publication date Aug 1, 2024
- Chipletz, Inc.
- Siddharth Ravichandran
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and Apparatus for Prevention, Cessation, Detection, and Moni...
- Publication number 20240120293
- Publication date Apr 11, 2024
- Chipletz, Inc.
- Michael Su
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CREATING INTERCONNECTS BETWEEN DIES USING A CROSS-OVER DIE AND THRO...
- Publication number 20240071940
- Publication date Feb 29, 2024
- ADVANCED MICRO DEVICES, INC.
- RAHUL AGARWAL
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Package Assembly and Method of Attaching Multi-Height Dies/Modules...
- Publication number 20230411174
- Publication date Dec 21, 2023
- Chipletz, Inc.
- Michael Su
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Inductors Embedded in Package Substrate and Board and Method and Sy...
- Publication number 20230395305
- Publication date Dec 7, 2023
- Chipletz, Inc.
- Siddharth Ravichandran
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Through Package Vertical Interconnect and Method of Making Same
- Publication number 20230343687
- Publication date Oct 26, 2023
- Chipletz, Inc.
- Bryan Black
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGE WITH INTEGRATED CAPACITORS
- Publication number 20230290746
- Publication date Sep 14, 2023
- CHIPLETZ, INC.
- Michael SU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CREATING INTERCONNECTS BETWEEN DIES USING A CROSS-OVER DIE AND THRO...
- Publication number 20220051985
- Publication date Feb 17, 2022
- ADVANCED MICRO DEVICES, INC.
- RAHUL AGARWAL
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERPOSER WITH BEYOND RETICLE FIELD CONDUCTOR PADS
- Publication number 20170213787
- Publication date Jul 27, 2017
- Michael S. Alfano
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR WORKPIECE WITH SELECTIVE BACKSIDE METALLIZATION
- Publication number 20170092616
- Publication date Mar 30, 2017
- Michael Z. Su
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR CHIP WITH OFFLOADED LOGIC
- Publication number 20160329312
- Publication date Nov 10, 2016
- Sean M. O'Mullan
- G01 - MEASURING TESTING
Information Patent Application
INTERPOSER WITH IDENTIFICATION SYSTEM
- Publication number 20130341783
- Publication date Dec 26, 2013
- Michael Alfano
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR SUBSTRATE WITH ONBOARD TEST STRUCTURE
- Publication number 20130342231
- Publication date Dec 26, 2013
- Michael Alfano
- G01 - MEASURING TESTING
Information Patent Application
THERMAL MANAGEMENT OF STACKED SEMICONDUCTOR CHIPS WITH ELECTRICALLY...
- Publication number 20130256872
- Publication date Oct 3, 2013
- Michael Su
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKED SEMICONDUCTOR COMPONENTS WITH UNIVERSAL INTERCONNECT FOOTPRINT
- Publication number 20130256895
- Publication date Oct 3, 2013
- Michael Su
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIE STACKING WITH COUPLED ELECTRICAL INTERCONNECTS TO ALIGN PROXIMI...
- Publication number 20130256913
- Publication date Oct 3, 2013
- Bryan Black
- H01 - BASIC ELECTRIC ELEMENTS

Michael S. Alfano

Person

Patents Grantslast 30 patents

Creating interconnects between dies using a cross-over die and thro...

Interposer with identification system

Interposer with beyond reticle field conductor pads

Semiconductor workpiece with selective backside metallization

Thermal management of stacked semiconductor chips with electrically...

Patents Applicationslast 30 patents

Semiconductor Package with Integrated Capacitors

Co-Packaging Assembly and Method for Attaching Photonic Dies/Module...

Low-Equivalent-Series-Resistance Capacitors with Solid-State Curren...

Method and Apparatus for Prevention, Cessation, Detection, and Moni...

CREATING INTERCONNECTS BETWEEN DIES USING A CROSS-OVER DIE AND THRO...

Package Assembly and Method of Attaching Multi-Height Dies/Modules...

Inductors Embedded in Package Substrate and Board and Method and Sy...

Through Package Vertical Interconnect and Method of Making Same

SEMICONDUCTOR PACKAGE WITH INTEGRATED CAPACITORS

CREATING INTERCONNECTS BETWEEN DIES USING A CROSS-OVER DIE AND THRO...

INTERPOSER WITH BEYOND RETICLE FIELD CONDUCTOR PADS

SEMICONDUCTOR WORKPIECE WITH SELECTIVE BACKSIDE METALLIZATION

SEMICONDUCTOR CHIP WITH OFFLOADED LOGIC

INTERPOSER WITH IDENTIFICATION SYSTEM

SEMICONDUCTOR SUBSTRATE WITH ONBOARD TEST STRUCTURE

THERMAL MANAGEMENT OF STACKED SEMICONDUCTOR CHIPS WITH ELECTRICALLY...

STACKED SEMICONDUCTOR COMPONENTS WITH UNIVERSAL INTERCONNECT FOOTPRINT

DIE STACKING WITH COUPLED ELECTRICAL INTERCONNECTS TO ALIGN PROXIMI...