Michel Bron

Person

Lausanne, CH

People

Patents Grantslast 30 patents

Information Patent Grant
Integrated circuit including memory array having a segmented bit li...
- Patent number 8,395,937
- Issue date Mar 12, 2013
- Micron Technology, Inc.
- David Fisch
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit including memory array having a segmented bit li...
- Patent number 7,969,779
- Issue date Jun 28, 2011
- Micron Technology, Inc.
- David Fisch
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device and method of operating same
- Patent number 7,733,693
- Issue date Jun 8, 2010
- Innovative Silicon ISi Sa
- Richard Ferrant
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit including memory array having a segmented bit li...
- Patent number 7,542,340
- Issue date Jun 2, 2009
- Innovative Silicon ISi Sa
- David Fisch
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device and method of operating same
- Patent number 7,359,229
- Issue date Apr 15, 2008
- Innovative Silicon S.A.
- Richard Ferrant
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device and method of operating same
- Patent number 7,187,581
- Issue date Mar 6, 2007
- Innovative Silicon S.A.
- Richard Ferrant
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory cell, array, architecture and device, and meth...
- Patent number 7,085,153
- Issue date Aug 1, 2006
- Innovative Silicon S.A.
- Richard Ferrant
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device and method of operating same
- Patent number 7,085,156
- Issue date Aug 1, 2006
- Innovative Silicon S.A.
- Richard Ferrant
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for writing an erasable non-volatile memory
- Patent number 6,128,224
- Issue date Oct 3, 2000
- Motorola, Inc.
- Bruce Lee Morton
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for writing an erasable non-volatile memory
- Patent number 6,075,727
- Issue date Jun 13, 2000
- Motorola, Inc.
- Bruce Lee Morton
- G11 - INFORMATION STORAGE
Information Patent Grant
Protection circuit for a microprocessor
- Patent number 5,557,743
- Issue date Sep 17, 1996
- Motorola, Inc.
- Raul Pombo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory cards
- Patent number 4,910,393
- Issue date Mar 20, 1990
- Motorola, Inc.
- Anil Gercekci
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data card circuits
- Patent number 4,841,133
- Issue date Jun 20, 1989
- Motorola, Inc.
- Anil Gercekci
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Integrated Circuit Including Memory Array Having a Segmented Bit Li...
- Publication number 20110249499
- Publication date Oct 13, 2011
- Micron Technology, Inc.
- David Fisch
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated Circuit Including Memory Array Having a Segmented Bit Li...
- Publication number 20090231898
- Publication date Sep 17, 2009
- David Fisch
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory device and method of operating same
- Publication number 20080205114
- Publication date Aug 28, 2008
- Richard Ferrant
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated circuit including memory array having a segmented bit li...
- Publication number 20080013359
- Publication date Jan 17, 2008
- David Fisch
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory device and method of operating same
- Publication number 20070159911
- Publication date Jul 12, 2007
- Richard Ferrant
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory device and method of operating same
- Publication number 20050174873
- Publication date Aug 11, 2005
- Richard Ferrant
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory device and method of operating same
- Publication number 20050157580
- Publication date Jul 21, 2005
- Richard Ferrant
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory cell, array, architecture and device, and meth...
- Publication number 20050013163
- Publication date Jan 20, 2005
- Richard Ferrant
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory device and method of operating same
- Publication number 20040228168
- Publication date Nov 18, 2004
- Richard Ferrant
- G11 - INFORMATION STORAGE

Michel Bron

Person

Patents Grantslast 30 patents

Integrated circuit including memory array having a segmented bit li...

Integrated circuit including memory array having a segmented bit li...

Semiconductor memory device and method of operating same

Integrated circuit including memory array having a segmented bit li...

Semiconductor memory device and method of operating same

Semiconductor memory device and method of operating same

Semiconductor memory cell, array, architecture and device, and meth...

Semiconductor memory device and method of operating same

Method and apparatus for writing an erasable non-volatile memory

Method and apparatus for writing an erasable non-volatile memory

Protection circuit for a microprocessor

Memory cards

Data card circuits

Patents Applicationslast 30 patents

Integrated Circuit Including Memory Array Having a Segmented Bit Li...

Integrated Circuit Including Memory Array Having a Segmented Bit Li...

Semiconductor memory device and method of operating same

Integrated circuit including memory array having a segmented bit li...

Semiconductor memory device and method of operating same

Semiconductor memory device and method of operating same

Semiconductor memory device and method of operating same

Semiconductor memory cell, array, architecture and device, and meth...

Semiconductor memory device and method of operating same