Mira Ben-Tzur

Person

Sunnyvale, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method of forming a floating metal structure in an integrated circuit
- Patent number 7,227,212
- Issue date Jun 5, 2007
- Cypress Semiconductor Corporation
- Mira Ben-Tzur
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Protection of low-k dielectric in a passivation level
- Patent number 7,192,867
- Issue date Mar 20, 2007
- Cypress Semiconductor Corporation
- Mira Ben-Tzur
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual-damascene process and associated floating metal structures
- Patent number 7,026,235
- Issue date Apr 11, 2006
- Cypress Semiconductor Corporation
- Mira Ben-Tzur
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit with improved RC delay
- Patent number 7,018,942
- Issue date Mar 28, 2006
- Cypress Semiconductor Corporation
- Mira Ben-Tzur
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Aluminum-filled via structure with barrier layer
- Patent number 6,977,217
- Issue date Dec 20, 2005
- Cypress Semiconductor Corporation
- Mira Ben-Tzur
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low-k dielectric layer with overlying adhesion layer
- Patent number 6,939,792
- Issue date Sep 6, 2005
- Cypress Semiconductor Corporation
- Maryam Jahangiri
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making borderless contacts in an integrated circuit
- Patent number 6,911,395
- Issue date Jun 28, 2005
- Cypress Semiconductor Corporation
- Jiamin Qiao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low-k dielectric layer with air gaps
- Patent number 6,903,002
- Issue date Jun 7, 2005
- Cypress Semiconductor Corporation
- Mira Ben-Tzur
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reticle repeater monitor wafer and method for verifying reticles
- Patent number 6,844,235
- Issue date Jan 18, 2005
- Cypress Semiconductor Corporation
- Christopher M. Jones
- G01 - MEASURING TESTING
Information Patent Grant
Integrated circuit with improved RC delay
- Patent number 6,841,878
- Issue date Jan 11, 2005
- Cypress Semiconductor Corporation
- Mira Ben-Tzur
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a floating metal structure in an integrated circuit
- Patent number 6,835,616
- Issue date Dec 28, 2004
- Cypress Semiconductor Corporation
- Mira Ben-Tzur
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Metal stack for local interconnect layer
- Patent number 6,774,033
- Issue date Aug 10, 2004
- Cypress Semiconductor Corporation
- Mira Ben-Tzur
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Borderless contact architecture
- Patent number 6,713,831
- Issue date Mar 30, 2004
- Cypress Semiconductor Corp.
- Sharmin Sadoughi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit with improved RC delay
- Patent number 6,660,661
- Issue date Dec 9, 2003
- Cypress Semiconductor Corporation
- Mira Ben-Tzur
- H01 - BASIC ELECTRIC ELEMENTS

Mira Ben-Tzur

Person

Patents Grantslast 30 patents

Method of forming a floating metal structure in an integrated circuit

Protection of low-k dielectric in a passivation level

Dual-damascene process and associated floating metal structures

Integrated circuit with improved RC delay

Aluminum-filled via structure with barrier layer

Low-k dielectric layer with overlying adhesion layer

Method of making borderless contacts in an integrated circuit

Low-k dielectric layer with air gaps

Reticle repeater monitor wafer and method for verifying reticles

Integrated circuit with improved RC delay

Method of forming a floating metal structure in an integrated circuit

Metal stack for local interconnect layer

Borderless contact architecture

Integrated circuit with improved RC delay