Mitch C. Taylor

Person

Lake Oswego, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Methods for forming NMOS EPI layers
- Patent number 8,999,798
- Issue date Apr 7, 2015
- Applied Materials, Inc.
- Mitchell C. Taylor
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Plasma implantated impurities in junction region recesses
- Patent number 7,671,358
- Issue date Mar 2, 2010
- Intel Corporation
- Nick Lindert
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Forming dual metal complementary metal oxide semiconductor integrat...
- Patent number 7,439,113
- Issue date Oct 21, 2008
- Intel Corporation
- Mark Doczy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Plasma implantation of impurities in junction region recesses
- Patent number 7,314,804
- Issue date Jan 1, 2008
- Intel Corporation
- Nick Lindert
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Implanting carbon to form P-type source drain extensions
- Patent number 7,235,843
- Issue date Jun 26, 2007
- Intel Corporation
- Aaron O. Vanderpool
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for laser annealing
- Patent number 7,211,501
- Issue date May 1, 2007
- Intel Corporation
- Mark Y. Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Arrangements incorporating laser-induced cleaving
- Patent number 7,052,978
- Issue date May 30, 2006
- Intel Corporation
- Mohamad A. Shaheen
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Implanting carbon to form P-type drain extensions
- Patent number 7,015,108
- Issue date Mar 21, 2006
- Intel Corporation
- Aaron O. Vanderpool
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Creating shallow junction transistors
- Patent number 6,936,518
- Issue date Aug 30, 2005
- Intel Corporation
- Jack Hwang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Forming strained source drain junction field effect transistors
- Patent number 6,911,706
- Issue date Jun 28, 2005
- Intel Corporation
- Jack Hwang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Surface alteration of metal interconnect in integrated circuits for...
- Patent number 6,794,755
- Issue date Sep 21, 2004
- Intel Corporation
- Jose A. Maiz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Device structure and method for reducing silicide encroachment
- Patent number 6,777,759
- Issue date Aug 17, 2004
- Intel Corporation
- Robert S. Chau
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Device structure and method for reducing silicide encroachment
- Patent number 6,765,273
- Issue date Jul 20, 2004
- Intel Corporation
- Robert S. Chau
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Forming strained source drain junction field effect transistors
- Patent number 6,638,802
- Issue date Oct 28, 2003
- Intel Corporation
- Jack Hwang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Extension of shallow trench isolation by ion implantation
- Patent number 6,590,271
- Issue date Jul 8, 2003
- Intel Corporation
- Mark Y. Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Device structure and method for reducing silicide encroachment
- Patent number 6,518,155
- Issue date Feb 11, 2003
- Intel Corporation
- Robert S. Chau
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Extension of shallow trench isolation by ion implantation
- Patent number 6,432,798
- Issue date Aug 13, 2002
- Intel Corporation
- Mark Y. Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Ion implantation method
- Patent number 6,200,883
- Issue date Mar 13, 2001
- Applied Materials, Inc.
- Mitchell C. Taylor
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Transistor with minimal junction capacitance and method of fabrication
- Patent number 6,198,142
- Issue date Mar 6, 2001
- Intel Corporation
- Robert S. Chau
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating a MOS transistor with a raised source/drain e...
- Patent number 6,121,100
- Issue date Sep 19, 2000
- Intel Corporation
- Ebrahim Andideh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Ion implanter with post mass selection deceleration
- Patent number 5,932,882
- Issue date Aug 3, 1999
- Applied Materials, Inc.
- Jonathan Gerald England
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a transistor
- Patent number 5,908,313
- Issue date Jun 1, 1999
- Intel Corporation
- Robert S. Chau
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
METHODS FOR FORMING NMOS EPI LAYERS
- Publication number 20110175140
- Publication date Jul 21, 2011
- Applied Materials, Inc.
- MITCHELL C. TAYLOR
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF MAKING AN IMPROVED SELECTIVE EMITTER FOR SILICON SOLAR CELLS
- Publication number 20090142875
- Publication date Jun 4, 2009
- Applied Materials, Inc.
- Peter Borden
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
Forming dual metal complementary metal oxide semiconductor integrat...
- Publication number 20090020825
- Publication date Jan 22, 2009
- Mark Doczy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SOURCE/DRAIN EXTENSIONS IN NMOS DEVICES
- Publication number 20080160683
- Publication date Jul 3, 2008
- Aaron O. Vanderpool
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Plasma implantated impurities in junction region recesses
- Publication number 20080001170
- Publication date Jan 3, 2008
- Nick Lindert
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Plasma implantation of impurities in junction region recesses
- Publication number 20060148220
- Publication date Jul 6, 2006
- Nick Lindert
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Implanting carbon to form P-type source drain extensions
- Publication number 20060113570
- Publication date Jun 1, 2006
- Aaron O. Vanderpool
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Forming dual metal complementary metal oxide semiconductor integrat...
- Publication number 20060006522
- Publication date Jan 12, 2006
- Mark Doczy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Creating shallow junction transistors
- Publication number 20050191834
- Publication date Sep 1, 2005
- Jack Hwang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Implanting carbon to form P-type source drain extensions
- Publication number 20050191816
- Publication date Sep 1, 2005
- Aaron O. Vanderpool
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CREATING SHALLOW JUNCTION TRANSISTORS
- Publication number 20050158957
- Publication date Jul 21, 2005
- Jack Hwang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Arrangements incorporating laser-induced cleaving
- Publication number 20050048738
- Publication date Mar 3, 2005
- Mohamad A. Shaheen
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Application
Method and apparatus for laser annealing
- Publication number 20040115931
- Publication date Jun 17, 2004
- Mark Y. Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Codoping of source drains using carbon or fluorine ion implants to...
- Publication number 20040102013
- Publication date May 27, 2004
- Jack Hwang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
A METHOD OF FORMING SURFACE ALTERATION OF METAL INTERCONNECT IN INT...
- Publication number 20040056366
- Publication date Mar 25, 2004
- Jose A. Maiz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Surface alteration of metal interconnect in integrated circuits for...
- Publication number 20040056329
- Publication date Mar 25, 2004
- Jose A. Maiz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Forming strained source drain junction field effect transistors
- Publication number 20040038468
- Publication date Feb 26, 2004
- Jack Hwang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of making a semiconductor transistor by implanting ions into...
- Publication number 20020197885
- Publication date Dec 26, 2002
- Jack Hwang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of forming a doped region in a semiconductor material
- Publication number 20020086502
- Publication date Jul 4, 2002
- Mark Y. Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Device structure and method for reducing silicide encroachment
- Publication number 20020053711
- Publication date May 9, 2002
- Robert S. Chau
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Extension of shallow trench isolation by ion implantation
- Publication number 20020037627
- Publication date Mar 28, 2002
- Mark Y. Liu
- H01 - BASIC ELECTRIC ELEMENTS

Mitch C. Taylor

Person

Patents Grantslast 30 patents

Methods for forming NMOS EPI layers

Plasma implantated impurities in junction region recesses

Forming dual metal complementary metal oxide semiconductor integrat...

Plasma implantation of impurities in junction region recesses

Implanting carbon to form P-type source drain extensions

Method and apparatus for laser annealing

Arrangements incorporating laser-induced cleaving

Implanting carbon to form P-type drain extensions

Creating shallow junction transistors

Forming strained source drain junction field effect transistors

Surface alteration of metal interconnect in integrated circuits for...

Device structure and method for reducing silicide encroachment

Device structure and method for reducing silicide encroachment

Forming strained source drain junction field effect transistors

Extension of shallow trench isolation by ion implantation

Device structure and method for reducing silicide encroachment

Extension of shallow trench isolation by ion implantation

Ion implantation method

Transistor with minimal junction capacitance and method of fabrication

Method of fabricating a MOS transistor with a raised source/drain e...

Ion implanter with post mass selection deceleration

Method of forming a transistor

Patents Applicationslast 30 patents

METHODS FOR FORMING NMOS EPI LAYERS

METHOD OF MAKING AN IMPROVED SELECTIVE EMITTER FOR SILICON SOLAR CELLS

Forming dual metal complementary metal oxide semiconductor integrat...

SOURCE/DRAIN EXTENSIONS IN NMOS DEVICES

Plasma implantated impurities in junction region recesses

Plasma implantation of impurities in junction region recesses

Implanting carbon to form P-type source drain extensions

Forming dual metal complementary metal oxide semiconductor integrat...

Creating shallow junction transistors

Implanting carbon to form P-type source drain extensions

CREATING SHALLOW JUNCTION TRANSISTORS

Arrangements incorporating laser-induced cleaving

Method and apparatus for laser annealing

Codoping of source drains using carbon or fluorine ion implants to...

A METHOD OF FORMING SURFACE ALTERATION OF METAL INTERCONNECT IN INT...

Surface alteration of metal interconnect in integrated circuits for...

Forming strained source drain junction field effect transistors

Method of making a semiconductor transistor by implanting ions into...

Method of forming a doped region in a semiconductor material

Device structure and method for reducing silicide encroachment

Extension of shallow trench isolation by ion implantation