Mitsuru Shimizu

Person

Kawasaki-shi, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor integrated circuit device having a test function
- Patent number 7,057,948
- Issue date Jun 6, 2006
- Kabushiki Kaisha Toshiba
- Mitsuru Shimizu
- G11 - INFORMATION STORAGE
Information Patent Grant
Substrate structure of semi-conductor device
- Patent number 6,104,233
- Issue date Aug 15, 2000
- Kabushiki Kaisha Toshiba
- Syuso Fujii
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Ferroelectric memory used for the RFID system, method for driving t...
- Patent number 6,097,622
- Issue date Aug 1, 2000
- Kabushiki Kaisha Toshiba
- Mitsuru Shimizu
- G11 - INFORMATION STORAGE
Information Patent Grant
Ferroelectric memory and screening method therefor
- Patent number 6,046,926
- Issue date Apr 4, 2000
- Kabushiki Kaisha Toshiba
- Sumio Tanaka
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device having input protection circuit
- Patent number 5,949,109
- Issue date Sep 7, 1999
- Kabushiki Kaisha Toshiba
- Mitsuru Shimizu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nonvolatile ferroelectric memory
- Patent number 5,943,256
- Issue date Aug 24, 1999
- Kabushiki Kaisha Toshiba
- Mitsuru Shimizu
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device
- Patent number RE36236
- Issue date Jun 29, 1999
- Kabushiki Kaisha Toshiba
- Mitsuru Shimizu
- 365 - Static information storage and retrieval
Information Patent Grant
Fram, fram card, and card system using the same
- Patent number 5,892,706
- Issue date Apr 6, 1999
- Kabushiki Kaisha Toshiba
- Mitsuru Shimizu
- G11 - INFORMATION STORAGE
Information Patent Grant
FRAM, FRAM card, and card system using the same
- Patent number 5,798,964
- Issue date Aug 25, 1998
- Toshiba Corporation
- Mitsuru Shimizu
- G11 - INFORMATION STORAGE
Information Patent Grant
Input protection circuit formed in a semiconductor substrate
- Patent number 5,594,265
- Issue date Jan 14, 1997
- Kabushiki Kaisha Toshiba
- Mitsuru Shimizu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor memory apparatus having a plurality of word line driv...
- Patent number 5,511,027
- Issue date Apr 23, 1996
- Kabushiki Kaisha Toshiba
- Mitsuru Shimizu
- G11 - INFORMATION STORAGE
Information Patent Grant
Pattern layout of power source lines in semiconductor memory device
- Patent number 5,293,334
- Issue date Mar 8, 1994
- Kabushiki Kaisha Tobshiba
- Mitsuru Shimizu
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device
- Patent number 5,142,492
- Issue date Aug 25, 1992
- Kabushiki Kaisha Toshiba
- Mitsuru Shimizu
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device having burn-in test function
- Patent number 5,119,337
- Issue date Jun 2, 1992
- Kabushiki Kaisha Toshiba
- Mitsuru Shimizu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Protection circuit for use in semiconductor integrated circuit device
- Patent number 5,072,271
- Issue date Dec 10, 1991
- Kabushiki Kaisha Toshiba
- Mitsuru Shimizu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device
- Patent number 5,066,997
- Issue date Nov 19, 1991
- Kabushiki Kaisha Toshiba
- Kiyofumi Sakurai
- G11 - INFORMATION STORAGE
Information Patent Grant
Input protection circuit for semiconductor integrated circuit device
- Patent number 4,994,874
- Issue date Feb 19, 1991
- Kabushiki Kaisha Toshiba
- Mitsuru Shimizu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Input protection circuit for MOS device
- Patent number 4,962,320
- Issue date Oct 9, 1990
- Kabushiki Kaisha Toshiba
- Yoshio Okada
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor memory device with row and column word lines and row...
- Patent number 4,896,294
- Issue date Jan 23, 1990
- Kabushiki Kaisha Toshiba
- Mitsuru Shimizu
- G11 - INFORMATION STORAGE
Information Patent Grant
Intermediate potential generation circuit
- Patent number 4,663,584
- Issue date May 5, 1987
- Kabushiki Kaisha Toshiba
- Yoshio Okada
- G05 - CONTROLLING REGULATING

Patents Applicationslast 30 patents

Information Patent Application
Semiconductor integrated circuit device having a test function
- Publication number 20040213058
- Publication date Oct 28, 2004
- Mitsuru Shimizu
- G11 - INFORMATION STORAGE

Mitsuru Shimizu

Person

Patents Grantslast 30 patents

Semiconductor integrated circuit device having a test function

Substrate structure of semi-conductor device

Ferroelectric memory used for the RFID system, method for driving t...

Ferroelectric memory and screening method therefor

Semiconductor device having input protection circuit

Nonvolatile ferroelectric memory

Semiconductor memory device

Fram, fram card, and card system using the same

FRAM, FRAM card, and card system using the same

Input protection circuit formed in a semiconductor substrate

Semiconductor memory apparatus having a plurality of word line driv...

Pattern layout of power source lines in semiconductor memory device

Semiconductor memory device

Semiconductor memory device having burn-in test function

Protection circuit for use in semiconductor integrated circuit device

Semiconductor device

Input protection circuit for semiconductor integrated circuit device

Input protection circuit for MOS device

Semiconductor memory device with row and column word lines and row...

Intermediate potential generation circuit

Patents Applicationslast 30 patents

Semiconductor integrated circuit device having a test function