Mohit K. HARAN

Person

Hillsboro, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Self-aligned patterning with colored blocking and structures result...
- Patent number 12,154,855
- Issue date Nov 26, 2024
- Intel Corporation
- Mohit K. Haran
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Contact over active gate structures with metal oxide layers to inhi...
- Patent number 12,080,639
- Issue date Sep 3, 2024
- Intel Corporation
- Rami Hourani
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Gate spacing in integrated circuit structures
- Patent number 12,002,678
- Issue date Jun 4, 2024
- Intel Corporation
- Charles Henry Wallace
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fabrication of gate-all-around integrated circuit structures having...
- Patent number 11,990,472
- Issue date May 21, 2024
- Intel Corporation
- Leonard P. Guler
- G11 - INFORMATION STORAGE
Information Patent Grant
1D vertical edge blocking (VEB) via and plug
- Patent number 11,972,979
- Issue date Apr 30, 2024
- Intel Corporation
- Leonard P. Guler
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
1D vertical edge blocking (VEB) via and plug
- Patent number 11,721,580
- Issue date Aug 8, 2023
- Intel Corporation
- Leonard P. Guler
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to repair edge placement errors in a semiconductor device
- Patent number 11,664,274
- Issue date May 30, 2023
- Intel Corporation
- Charles H. Wallace
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Via contact patterning method to increase edge placement error margin
- Patent number 11,652,045
- Issue date May 16, 2023
- Intel Corporation
- Mohit K. Haran
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Contact over active gate structures with etch stop layers for advan...
- Patent number 11,393,754
- Issue date Jul 19, 2022
- Intel Corporation
- Atul Madhavan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Via contact patterning method to increase edge placement error margin
- Patent number 11,211,324
- Issue date Dec 28, 2021
- Intel Corporation
- Mohit K. Haran
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Plug and trench architectures for integrated circuits and methods o...
- Patent number 11,171,043
- Issue date Nov 9, 2021
- Intel Corporation
- Charles H. Wallace
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Conductive via and metal line end fabrication and structures result...
- Patent number 11,145,541
- Issue date Oct 12, 2021
- Intel Corporation
- Charles H. Wallace
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Metal via processing schemes with via critical dimension (CD) contr...
- Patent number 10,636,700
- Issue date Apr 28, 2020
- Intel Corporation
- Paul A. Nyhus
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Metal via processing schemes with via critical dimension (CD) contr...
- Patent number 10,319,625
- Issue date Jun 11, 2019
- Intel Corporation
- Paul A. Nyhus
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
INTEGRATED CIRCUIT STRUCTURES HAVING CUT METAL GATES
- Publication number 20240347539
- Publication date Oct 17, 2024
- Intel Corporation
- Tahir GHANI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONTACT OVER ACTIVE GATE STRUCTURES WITH ETCH STOP LAYERS FOR ADVAN...
- Publication number 20240347465
- Publication date Oct 17, 2024
- Intel Corporation
- Atul MADHAVAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GATE SPACING IN INTEGRATED CIRCUIT STRUCTURES
- Publication number 20240249946
- Publication date Jul 25, 2024
- Intel Corporation
- Charles Henry Wallace
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-ALIGNED BACKBONE FOR FORKSHEET TRANSISTORS
- Publication number 20240213250
- Publication date Jun 27, 2024
- Intel Corporation
- Shao Ming KOH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FABRICATION OF GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING...
- Publication number 20240178226
- Publication date May 30, 2024
- Intel Corporation
- Leonard P. GULER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT STRUCTURES HAVING DIELECTRIC ANCHOR AND CONFINED...
- Publication number 20240154037
- Publication date May 9, 2024
- Intel Corporation
- Leonard P. GULER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKED SOURCE OR DRAIN CONTACT FLYOVER
- Publication number 20240113177
- Publication date Apr 4, 2024
- Intel Corporation
- Sukru Yemenicioglu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SPLIT VIA STRUCTURES COUPLED TO CONDUCTIVE LINES FOR ADVANCED INTEG...
- Publication number 20240113019
- Publication date Apr 4, 2024
- Intel Corporation
- Leonard P. GULER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT STRUCTURES HAVING UNIFORM GRID METAL GATE AND TR...
- Publication number 20240105716
- Publication date Mar 28, 2024
- Intel Corporation
- Leonard P. GULER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MUSHROOMED VIA STRUCTURES FOR TRENCH CONTACT OR GATE CONTACT
- Publication number 20240105599
- Publication date Mar 28, 2024
- Intel Corporation
- Leonard P. GULER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONTACT OVER ACTIVE GATE STRUCTURES WITH ETCH STOP LAYERS FOR ADVAN...
- Publication number 20240006322
- Publication date Jan 4, 2024
- Intel Corporation
- Atul MADHAVAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT STRUCTURE WITH RECESSED SELF-ALIGNED DEEP BOUNDA...
- Publication number 20230420360
- Publication date Dec 28, 2023
- Intel Corporation
- Mohit HARAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
1D VERTICAL EDGE BLOCKING (VEB) VIA AND PLUG
- Publication number 20230326794
- Publication date Oct 12, 2023
- Intel Corporation
- Leonard P. GULER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT STRUCTURES HAVING CONDUCTIVE STRUCTURES IN FIN I...
- Publication number 20230317731
- Publication date Oct 5, 2023
- Intel Corporation
- Leonard P. GULER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RECESSED TRANSISTOR TERMINAL VIA JUMPERS
- Publication number 20230320057
- Publication date Oct 5, 2023
- Intel Corporation
- Clifford Ong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT STRUCTURES HAVING BACKSIDE GATE TIE-DOWN
- Publication number 20230317787
- Publication date Oct 5, 2023
- Intel Corporation
- Leonard P. GULER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GATE CUT GRID ACROSS INTEGRATED CIRCUIT
- Publication number 20230275085
- Publication date Aug 31, 2023
- Intel Corporation
- Leonard P. Guler
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RECESSED AND SELF-ALIGNED BURIED POWER RAIL
- Publication number 20230207466
- Publication date Jun 29, 2023
- Leonard P. GULER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EPI BARRIER ALIGNED BACKSIDE CONTACT
- Publication number 20230207623
- Publication date Jun 29, 2023
- Intel Corporation
- Leonard P. GULER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUITS WITH SELF-ALIGNED TUB ARCHITECTURE
- Publication number 20230207704
- Publication date Jun 29, 2023
- Dan S. LAVRIC
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT STRUCTURES HAVING METAL GATE PLUG LANDED ON DIEL...
- Publication number 20230197816
- Publication date Jun 22, 2023
- Mohammad HASAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT STRUCTURES HAVING DIELECTRIC ANCHOR AND CONFINED...
- Publication number 20230197854
- Publication date Jun 22, 2023
- Intel Corporation
- Leonard P. GULER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ISO-LEVEL VIAS FOR ADVANCED INTEGRATED CIRCUIT STRUCTURE FABRICATION
- Publication number 20230197609
- Publication date Jun 22, 2023
- Sukru YEMENICIOGLU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING EPITAXIAL SOUR...
- Publication number 20230197722
- Publication date Jun 22, 2023
- Intel Corporation
- Mohammad HASAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT STRUCTURES HAVING GATE CUT OFFSET
- Publication number 20230187444
- Publication date Jun 15, 2023
- Sukru YEMENICIOGLU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT STRUCTURES HAVING VERSATILE CHANNEL PLACEMENT
- Publication number 20230187515
- Publication date Jun 15, 2023
- Sukru YEMENICIOGLU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT STRUCTURES HAVING MAXIMIZED CHANNEL SIZING
- Publication number 20230187494
- Publication date Jun 15, 2023
- Intel Corporation
- Sukru YEMENICIOGLU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT STRUCTURES WITH TRENCH CONTACT FLYOVER STRUCTURE
- Publication number 20230187441
- Publication date Jun 15, 2023
- Intel Corporation
- Leonard P. GULER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONTACT OVER ACTIVE GATE STRUCTURES WITH CONDUCTIVE TRENCH CONTACT...
- Publication number 20230095402
- Publication date Mar 30, 2023
- Intel Corporation
- Manish CHANDHOK
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONTACT OVER ACTIVE GATE STRUCTURES WITH CONDUCTIVE TRENCH CONTACT...
- Publication number 20230101212
- Publication date Mar 30, 2023
- Intel Corporation
- Manish CHANDHOK
- H01 - BASIC ELECTRIC ELEMENTS

Mohit K. HARAN

Person

Patents Grantslast 30 patents

Self-aligned patterning with colored blocking and structures result...

Contact over active gate structures with metal oxide layers to inhi...

Gate spacing in integrated circuit structures

Fabrication of gate-all-around integrated circuit structures having...

1D vertical edge blocking (VEB) via and plug

1D vertical edge blocking (VEB) via and plug

Method to repair edge placement errors in a semiconductor device

Via contact patterning method to increase edge placement error margin

Contact over active gate structures with etch stop layers for advan...

Via contact patterning method to increase edge placement error margin

Plug and trench architectures for integrated circuits and methods o...

Conductive via and metal line end fabrication and structures result...

Metal via processing schemes with via critical dimension (CD) contr...

Metal via processing schemes with via critical dimension (CD) contr...

Patents Applicationslast 30 patents

INTEGRATED CIRCUIT STRUCTURES HAVING CUT METAL GATES

CONTACT OVER ACTIVE GATE STRUCTURES WITH ETCH STOP LAYERS FOR ADVAN...

GATE SPACING IN INTEGRATED CIRCUIT STRUCTURES

SELF-ALIGNED BACKBONE FOR FORKSHEET TRANSISTORS

FABRICATION OF GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING...

INTEGRATED CIRCUIT STRUCTURES HAVING DIELECTRIC ANCHOR AND CONFINED...

STACKED SOURCE OR DRAIN CONTACT FLYOVER

SPLIT VIA STRUCTURES COUPLED TO CONDUCTIVE LINES FOR ADVANCED INTEG...

INTEGRATED CIRCUIT STRUCTURES HAVING UNIFORM GRID METAL GATE AND TR...

MUSHROOMED VIA STRUCTURES FOR TRENCH CONTACT OR GATE CONTACT

CONTACT OVER ACTIVE GATE STRUCTURES WITH ETCH STOP LAYERS FOR ADVAN...

INTEGRATED CIRCUIT STRUCTURE WITH RECESSED SELF-ALIGNED DEEP BOUNDA...

1D VERTICAL EDGE BLOCKING (VEB) VIA AND PLUG

INTEGRATED CIRCUIT STRUCTURES HAVING CONDUCTIVE STRUCTURES IN FIN I...

RECESSED TRANSISTOR TERMINAL VIA JUMPERS

INTEGRATED CIRCUIT STRUCTURES HAVING BACKSIDE GATE TIE-DOWN

GATE CUT GRID ACROSS INTEGRATED CIRCUIT

RECESSED AND SELF-ALIGNED BURIED POWER RAIL

EPI BARRIER ALIGNED BACKSIDE CONTACT

INTEGRATED CIRCUITS WITH SELF-ALIGNED TUB ARCHITECTURE

INTEGRATED CIRCUIT STRUCTURES HAVING METAL GATE PLUG LANDED ON DIEL...

INTEGRATED CIRCUIT STRUCTURES HAVING DIELECTRIC ANCHOR AND CONFINED...

ISO-LEVEL VIAS FOR ADVANCED INTEGRATED CIRCUIT STRUCTURE FABRICATION

GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING EPITAXIAL SOUR...

INTEGRATED CIRCUIT STRUCTURES HAVING GATE CUT OFFSET

INTEGRATED CIRCUIT STRUCTURES HAVING VERSATILE CHANNEL PLACEMENT

INTEGRATED CIRCUIT STRUCTURES HAVING MAXIMIZED CHANNEL SIZING

INTEGRATED CIRCUIT STRUCTURES WITH TRENCH CONTACT FLYOVER STRUCTURE

CONTACT OVER ACTIVE GATE STRUCTURES WITH CONDUCTIVE TRENCH CONTACT...

CONTACT OVER ACTIVE GATE STRUCTURES WITH CONDUCTIVE TRENCH CONTACT...