Naewon Lee

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Seoul, KR

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Patents Grantslast 30 patents

Information Patent Grant
Multi-stack chip size packaging method
- Patent number 7,374,967
- Issue date May 20, 2008
- Dongbu Electronics Co., Ltd.
- Naewon Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Double side stack packaging method
- Patent number 7,112,473
- Issue date Sep 26, 2006
- DongbuAnam Semiconductor Inc.
- Naewon Lee
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Double side stack packaging method
- Publication number 20040152235
- Publication date Aug 5, 2004
- Dongbu Electronics Co., Ltd.
- Naewon Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Multi-stack chip size packaging method
- Publication number 20040150098
- Publication date Aug 5, 2004
- Dongbu Electronics Co., Ltd.
- Naewon Lee
- H01 - BASIC ELECTRIC ELEMENTS