Narayan Solayappan

Person

Colorado Springs, CO, US

People

Patents Grantslast 30 patents

Information Patent Grant
Ferroelectric and high dielectric constant integrated circuit capac...
- Patent number 7,459,318
- Issue date Dec 2, 2008
- Symetrix Corporation
- Carlos A. Paz de Araujo
- G11 - INFORMATION STORAGE
Information Patent Grant
Stacked memory cell having diffusion barriers
- Patent number 7,187,079
- Issue date Mar 6, 2007
- Symetrix Corporation
- Vikram Joshi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Ferroelectric and high dielectric constant integrated circuit capac...
- Patent number 7,075,134
- Issue date Jul 11, 2006
- Symetrix Corporation
- Carlos A. Paz de Araujo
- G11 - INFORMATION STORAGE
Information Patent Grant
Barrier layers for protecting metal oxides from hydrogen degradation
- Patent number 7,064,374
- Issue date Jun 20, 2006
- Symetrix Corporation
- Narayan Solayappan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interlayer oxide containing thin films for high dielectric constant...
- Patent number 6,867,452
- Issue date Mar 15, 2005
- Symetrix Corporation
- Shinichiro Hayashi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Ferroelectric composite material, method of making same and memory...
- Patent number 6,831,313
- Issue date Dec 14, 2004
- Symetrix Corporation
- Kiyoshi Uchiyama
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low thermal budget fabrication of ferroelectric memory using RTP
- Patent number 6,815,223
- Issue date Nov 9, 2004
- Symetrix Corporation
- Jolanta Celinska
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Chemical vapor deposition method of making layered superlattice mat...
- Patent number 6,787,181
- Issue date Sep 7, 2004
- Symetrix Corporation
- Kiyoshi Uchiyama
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Barrier layers for protecting metal oxides from hydrogen degradation
- Patent number 6,781,184
- Issue date Aug 24, 2004
- Symetrix Corporation
- Narayan Solayappan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked memory cell having diffusion barriers
- Patent number 6,743,643
- Issue date Jun 1, 2004
- Symetrix Corporation
- Vikram Joshi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Chemical vapor deposition process for fabricating layered superlatt...
- Patent number 6,706,585
- Issue date Mar 16, 2004
- Symetrix Corporation
- Kiyoshi Uchiyama
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Low temperature oxidizing method of making a layered superlattice m...
- Patent number 6,582,972
- Issue date Jun 24, 2003
- Symetrix Corporation
- Vikram Joshi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Chemical vapor deposition process for fabricating layered superlatt...
- Patent number 6,562,678
- Issue date May 13, 2003
- Symetrix Corporation
- Kiyoshi Uchiyama
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Ferroelectric and high dielectric constant transistors
- Patent number 6,559,469
- Issue date May 6, 2003
- Symetrix Corporation
- Carlos A. Paz de Araujo
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Method for forming an integrated circuit
- Patent number 6,541,279
- Issue date Apr 1, 2003
- Symetrix Corporation
- Shinichiro Hayashi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for fabrication of thin films by chemical vapo...
- Patent number 6,511,718
- Issue date Jan 28, 2003
- Symetrix Corporation
- Carlos A. Paz de Araujo
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Interlayer oxide containing thin films for high dielectric constant...
- Patent number 6,495,878
- Issue date Dec 17, 2002
- Symetrix Corporation
- Shinichiro Hayashi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Ferroelectric device with bismuth tantalate capping layer and metho...
- Patent number 6,437,380
- Issue date Aug 20, 2002
- Symetrix Corporation
- Myoungho Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low temperature rapid ramping anneal method for fabricating layered...
- Patent number 6,326,315
- Issue date Dec 4, 2001
- Symetrix Corporation
- Kiyoshi Uchiyama
- C30 - CRYSTAL GROWTH
Information Patent Grant
Recovery of electronic properties in hydrogen-damaged ferroelectric...
- Patent number 6,322,849
- Issue date Nov 27, 2001
- Symetrix Corporation
- Vikram Joshi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for misted liquid source deposition of thin fi...
- Patent number 6,258,733
- Issue date Jul 10, 2001
- Sand hill Capital II, LP
- Narayan Solayappan
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Low temperature process for fabricating layered superlattice materi...
- Patent number 6,245,580
- Issue date Jun 12, 2001
- Symetrix Corporation
- Narayan Solayappan
- C30 - CRYSTAL GROWTH
Information Patent Grant
Recovery of electronic properties in process-damaged ferroelectrics...
- Patent number 6,171,934
- Issue date Jan 9, 2001
- Symetrix Corporation
- Vikram Joshi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for misted liquid source deposition of thin fi...
- Patent number 6,116,184
- Issue date Sep 12, 2000
- Symetrix Corporation
- Narayan Solayappan
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Method and apparatus for preparing integrated circuit thin films by...
- Patent number 6,110,531
- Issue date Aug 29, 2000
- Symetrix Corporation
- Carlos A. Paz de Araujo
- C30 - CRYSTAL GROWTH
Information Patent Grant
Ferroelectric memory with ferroelectric thin film having thickness...
- Patent number 6,104,049
- Issue date Aug 15, 2000
- Symetrix Corporation
- Narayan Solayappan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for misted deposition of integrated circuit qu...
- Patent number 5,997,642
- Issue date Dec 7, 1999
- Symetrix Corporation
- Narayan Solayappan
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Process for fabricating layered superlattice materials and AB0.sub....
- Patent number 5,962,069
- Issue date Oct 5, 1999
- Symetrix Corporation
- Gunther Schindler
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Low imprint ferroelectric material for long retention memory and me...
- Patent number 5,883,828
- Issue date Mar 16, 1999
- Symetrix Corporation
- Joseph D. Cuchiaro
- G11 - INFORMATION STORAGE
Information Patent Grant
Liquid source formation of thin films using hexamethyl-disilazane
- Patent number 5,849,071
- Issue date Dec 15, 1998
- Symetrix Corporation
- Gary F. Derbenwick
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...

Patents Applicationslast 30 patents

Information Patent Application
Ferroelectric and high dielectric constant integrated circuit capac...
- Publication number 20060194348
- Publication date Aug 31, 2006
- Symetrix Corporation
- Carlos A. Paz de Araujo
- C30 - CRYSTAL GROWTH
Information Patent Application
Ferroelectric memory and method of operating same
- Publication number 20050094457
- Publication date May 5, 2005
- Symetrix Corporation
- Zheng Chen
- G11 - INFORMATION STORAGE
Information Patent Application
Barrier layers for protecting metal oxides from hydrogen degradation
- Publication number 20040232468
- Publication date Nov 25, 2004
- Symetrix Corporation
- Narayan Solayappan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Lanthanide series layered superlattice materials for integrated cir...
- Publication number 20040211998
- Publication date Oct 28, 2004
- Symetrix Corporation
- Carlos A. Paz de Araujo
- C30 - CRYSTAL GROWTH
Information Patent Application
Ferroelectric composite material, method of making same and memory...
- Publication number 20040129987
- Publication date Jul 8, 2004
- Kiyoshi Uchiyama
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Ferroelectric and high dielectric constant integrated circuit capac...
- Publication number 20040129961
- Publication date Jul 8, 2004
- Symetrix Corporation
- Carlos A. Paz de Araujo
- C30 - CRYSTAL GROWTH
Information Patent Application
Low thermal budget fabrication of ferroelectric memory using RTP
- Publication number 20040101977
- Publication date May 27, 2004
- Symetrix Corporation
- Jolanta Celinska
- C30 - CRYSTAL GROWTH
Information Patent Application
Stacked memory cell and process of fabricating same
- Publication number 20040089920
- Publication date May 13, 2004
- Symetrix Corporation
- Vikram Joshi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Stacked memory cell having diffusion barriers
- Publication number 20040046198
- Publication date Mar 11, 2004
- Symetrix Corporation
- Vikram Joshi
- C30 - CRYSTAL GROWTH
Information Patent Application
Chemical vapor deposition process for fabricating layered superlatt...
- Publication number 20030203513
- Publication date Oct 30, 2003
- Symetrix Corporation
- Kiyoshi Uchiyama
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
Lanthanide series layered superlattice materials for integrated cir...
- Publication number 20030152813
- Publication date Aug 14, 2003
- Symetrix Corporation
- Carlos A. Paz de Araujo
- C30 - CRYSTAL GROWTH
Information Patent Application
Stacked memory cell having diffusion barriers
- Publication number 20030132470
- Publication date Jul 17, 2003
- Symetrix Corporation
- Vikram Joshi
- C30 - CRYSTAL GROWTH
Information Patent Application
Stacked memory cell and process of fabricating same
- Publication number 20030102531
- Publication date Jun 5, 2003
- Symetrix Corporation
- Vikram Joshi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Barrier layers for protecting metal oxides from hydrogen degradation
- Publication number 20030098497
- Publication date May 29, 2003
- Symetrix Corporation
- Narayan Solayappan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Chemical vapor deposition method of making layered superlattice mat...
- Publication number 20030080325
- Publication date May 1, 2003
- Symetrix Corporation and Matsushita Electric Industrial Co., Ltd.
- Kiyoshi Uchiyama
- C30 - CRYSTAL GROWTH
Information Patent Application
Interlayer oxide containing thin films for high dielectric constant...
- Publication number 20030052357
- Publication date Mar 20, 2003
- Symetrix Corporation
- Shinichiro Hayashi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Ferroelectric composite material, method of making same, and memory...
- Publication number 20020168785
- Publication date Nov 14, 2002
- Symetrix Corporation
- Carlos A. Paz de Araujo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Metal oxide thin films for high dielectric constant application
- Publication number 20010012698
- Publication date Aug 9, 2001
- Symetrix Corporation
- Shinichiro Hayashi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RECOVERY OF ELECTRONIC PROPERTIES IN HYDROGEN-DAMAGED FERROELECTRIC...
- Publication number 20010002273
- Publication date May 31, 2001
- VIKRAM JOSHI
- H01 - BASIC ELECTRIC ELEMENTS

Narayan Solayappan

Person

Patents Grantslast 30 patents

Ferroelectric and high dielectric constant integrated circuit capac...

Stacked memory cell having diffusion barriers

Ferroelectric and high dielectric constant integrated circuit capac...

Barrier layers for protecting metal oxides from hydrogen degradation

Interlayer oxide containing thin films for high dielectric constant...

Ferroelectric composite material, method of making same and memory...

Low thermal budget fabrication of ferroelectric memory using RTP

Chemical vapor deposition method of making layered superlattice mat...

Barrier layers for protecting metal oxides from hydrogen degradation

Stacked memory cell having diffusion barriers

Chemical vapor deposition process for fabricating layered superlatt...

Low temperature oxidizing method of making a layered superlattice m...

Chemical vapor deposition process for fabricating layered superlatt...

Ferroelectric and high dielectric constant transistors

Method for forming an integrated circuit

Method and apparatus for fabrication of thin films by chemical vapo...

Interlayer oxide containing thin films for high dielectric constant...

Ferroelectric device with bismuth tantalate capping layer and metho...

Low temperature rapid ramping anneal method for fabricating layered...

Recovery of electronic properties in hydrogen-damaged ferroelectric...

Method and apparatus for misted liquid source deposition of thin fi...

Low temperature process for fabricating layered superlattice materi...

Recovery of electronic properties in process-damaged ferroelectrics...

Method and apparatus for misted liquid source deposition of thin fi...

Method and apparatus for preparing integrated circuit thin films by...

Ferroelectric memory with ferroelectric thin film having thickness...

Method and apparatus for misted deposition of integrated circuit qu...

Process for fabricating layered superlattice materials and AB0.sub....

Low imprint ferroelectric material for long retention memory and me...

Liquid source formation of thin films using hexamethyl-disilazane

Patents Applicationslast 30 patents

Ferroelectric and high dielectric constant integrated circuit capac...

Ferroelectric memory and method of operating same

Barrier layers for protecting metal oxides from hydrogen degradation

Lanthanide series layered superlattice materials for integrated cir...

Ferroelectric composite material, method of making same and memory...

Ferroelectric and high dielectric constant integrated circuit capac...

Low thermal budget fabrication of ferroelectric memory using RTP

Stacked memory cell and process of fabricating same

Stacked memory cell having diffusion barriers

Chemical vapor deposition process for fabricating layered superlatt...

Lanthanide series layered superlattice materials for integrated cir...

Stacked memory cell having diffusion barriers

Stacked memory cell and process of fabricating same

Barrier layers for protecting metal oxides from hydrogen degradation

Chemical vapor deposition method of making layered superlattice mat...

Interlayer oxide containing thin films for high dielectric constant...

Ferroelectric composite material, method of making same, and memory...

Metal oxide thin films for high dielectric constant application

RECOVERY OF ELECTRONIC PROPERTIES IN HYDROGEN-DAMAGED FERROELECTRIC...