Narayanan Balasubramanian

Person

Singapore, SG

People

Patents Grantslast 30 patents

Information Patent Grant
Nanowire sensor, nanowire sensor array and method of fabricating th...
- Patent number 8,236,595
- Issue date Aug 7, 2012
- Agency for Science, Technology and Research
- Ajay Agarwal
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Fully salicided (FUCA) MOSFET structure
- Patent number 7,682,914
- Issue date Mar 23, 2010
- Agency for Science, Technololgy, and Research
- Patrick Guo Qiang Lo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating tensile strained layers and compressive strai...
- Patent number 7,439,165
- Issue date Oct 21, 2008
- Agency for Sceince, Technology and Reasearch
- Patrick Guo Oiang Lo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to reduce junction leakage current in strained silicon on si...
- Patent number 7,425,751
- Issue date Sep 16, 2008
- Agency for Science, Technology and Research
- Narayanan Balasubramanian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Gate electrode architecture for improved work function tuning and m...
- Patent number 7,397,090
- Issue date Jul 8, 2008
- Agency for Science, Technology and Research
- Shajan Mathew
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating a CMOS device with dual metal gate electrodes
- Patent number 7,316,950
- Issue date Jan 8, 2008
- National University of Singapore
- Chang Seo Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fully salicided (FUSA) MOSFET structure
- Patent number 7,294,890
- Issue date Nov 13, 2007
- Agency for Science, Technology and Research
- Patrick Guo Qiang Lo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to reduce junction leakage current in strained silicon on si...
- Patent number 6,846,720
- Issue date Jan 25, 2005
- Agency for Science, Technology and Research
- Narayanan Balasubramanian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked LDD high frequency LDMOSFET
- Patent number 6,664,596
- Issue date Dec 16, 2003
- Institute of Microelectronics
- Jun Cai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for device using partial SOI
- Patent number 6,551,937
- Issue date Apr 22, 2003
- Institute of Microelectronics
- Cai Jun
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked LDD high frequency LDMOSFET
- Patent number 6,489,203
- Issue date Dec 3, 2002
- Institute of Microelectronics
- Jun Cai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating a shallow trench isolation structure with red...
- Patent number 6,468,853
- Issue date Oct 22, 2002
- Chartered Semiconductor Manufacturing Ltd.
- Palanivel Balasubramanian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to form gate oxides of different thicknesses on a silicon su...
- Patent number 6,235,591
- Issue date May 22, 2001
- Chartered Semiconductor Manufacturing Company
- Narayanan Balasubramanian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to form a smooth gate polysilicon sidewall in the fabricatio...
- Patent number 6,200,887
- Issue date Mar 13, 2001
- Chartered Semiconductor Manufacturing Ltd.
- Palanivel Balasubramaniam
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming a low impurity diffusion polysilicon layer
- Patent number 5,767,004
- Issue date Jun 16, 1998
- Chartered Semiconductor Manufacturing, Ltd.
- Narayanan Balasubramanian
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
NANOWIRE SENSOR, NANOWIRE SENSOR ARRAY AND METHOD OF FABRICATING TH...
- Publication number 20110193183
- Publication date Aug 11, 2011
- Agency for Science, Technology and Research
- Ajay Agarwal
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
TRANSPARENT MICROFLUIDIC DEVICE
- Publication number 20100055673
- Publication date Mar 4, 2010
- Agency for Science, Technology and Research
- Ajay Agarwal
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
Fully salicided (FUCA) MOSFET structure
- Publication number 20080064153
- Publication date Mar 13, 2008
- Agency For Science, Technology and Research
- Patrick Guo Qiang Lo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of fabricating strained channel devices
- Publication number 20060226483
- Publication date Oct 12, 2006
- Agency For Science, Technology and Research
- Patrick Guo Oiang Lo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Fully salicided (FUSA) MOSFET structure
- Publication number 20060199321
- Publication date Sep 7, 2006
- Agency For Science, Technology and Research
- Patrick Guo Qiang Lo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Gate Electrode Architecture for Improved Work Function Tuning and M...
- Publication number 20050275035
- Publication date Dec 15, 2005
- Agency for Science, Technology and Research
- Shajan Mathew
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method to reduce junction leakage current in strained silicon on si...
- Publication number 20050130361
- Publication date Jun 16, 2005
- Agency For Science, Technology and Research
- Narayanan Balasubramanian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CMOS compatible low band offset double barrier resonant tunneling d...
- Publication number 20050056827
- Publication date Mar 17, 2005
- Agency For Science, Technology and Research
- Ming Fu Li
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD TO REDUCE JUNCTION LEAKAGE CURRENT IN STRAINED SILICON ON SI...
- Publication number 20040259314
- Publication date Dec 23, 2004
- Institute Of Microelectronics & Amberwave Systems Corporation
- Narayanan Balasubramanian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of fabricating a CMOS device with dual metal gate electrodes
- Publication number 20040245578
- Publication date Dec 9, 2004
- Chang Seo Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Stacked LDD high frequency LDMOSFET
- Publication number 20030085448
- Publication date May 8, 2003
- Institute of Microelectronics
- Jun Cai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Process for device using partial SOI
- Publication number 20030040185
- Publication date Feb 27, 2003
- Institute of Microelectronics
- Cai Jun
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Stacked LDD high frequency LDMOSFET
- Publication number 20020164844
- Publication date Nov 7, 2002
- Institute of Microelectronics
- Jun Cai
- H01 - BASIC ELECTRIC ELEMENTS

Narayanan Balasubramanian

Person

Patents Grantslast 30 patents

Nanowire sensor, nanowire sensor array and method of fabricating th...

Fully salicided (FUCA) MOSFET structure

Method of fabricating tensile strained layers and compressive strai...

Method to reduce junction leakage current in strained silicon on si...

Gate electrode architecture for improved work function tuning and m...

Method of fabricating a CMOS device with dual metal gate electrodes

Fully salicided (FUSA) MOSFET structure

Method to reduce junction leakage current in strained silicon on si...

Stacked LDD high frequency LDMOSFET

Process for device using partial SOI

Stacked LDD high frequency LDMOSFET

Method of fabricating a shallow trench isolation structure with red...

Method to form gate oxides of different thicknesses on a silicon su...

Method to form a smooth gate polysilicon sidewall in the fabricatio...

Method for forming a low impurity diffusion polysilicon layer

Patents Applicationslast 30 patents

NANOWIRE SENSOR, NANOWIRE SENSOR ARRAY AND METHOD OF FABRICATING TH...

TRANSPARENT MICROFLUIDIC DEVICE

Fully salicided (FUCA) MOSFET structure

Method of fabricating strained channel devices

Fully salicided (FUSA) MOSFET structure

Gate Electrode Architecture for Improved Work Function Tuning and M...

Method to reduce junction leakage current in strained silicon on si...

CMOS compatible low band offset double barrier resonant tunneling d...

METHOD TO REDUCE JUNCTION LEAKAGE CURRENT IN STRAINED SILICON ON SI...

Method of fabricating a CMOS device with dual metal gate electrodes

Stacked LDD high frequency LDMOSFET

Process for device using partial SOI

Stacked LDD high frequency LDMOSFET