Narendra Khandekar

Person

Folsom, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Memory buffer device integrating refresh logic
- Patent number 7,353,329
- Issue date Apr 1, 2008
- Intel Corporation
- Robert M. Ellis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for controlling power states in a memory devic...
- Patent number 7,000,133
- Issue date Feb 14, 2006
- Intel Corporation
- James M. Dodd
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory bus termination with memory unit having termination control
- Patent number 6,981,089
- Issue date Dec 27, 2005
- Intel Corporation
- James M. Dodd
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method to track flag transitions for DRAM data transfer
- Patent number 6,976,120
- Issue date Dec 13, 2005
- Intel Corporation
- Narendra S. Khandekar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method to track command signal occurrence for DRAM da...
- Patent number 6,976,121
- Issue date Dec 13, 2005
- Intel Corporation
- Narendra S. Khandekar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of addressing individual memory devices on a memory module
- Patent number 6,832,177
- Issue date Dec 14, 2004
- Intel Corporation
- Narendra S. Khandekar
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for encoding auto-precharge
- Patent number 6,829,184
- Issue date Dec 7, 2004
- Intel Corporation
- Narendra S. Khandekar
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory buffer arrangement
- Patent number 6,639,820
- Issue date Oct 28, 2003
- Intel Corporation
- Narendra S. Khandekar
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for automatically detecting whether a memory u...
- Patent number 6,567,904
- Issue date May 20, 2003
- Intel Corporation
- Narendra Khandekar
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for resource sharing in a multi-processor system
- Patent number 6,502,150
- Issue date Dec 31, 2002
- Intel Corporation
- Zohar Bogin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Speculative request pointer advance for fast back-to-back reads
- Patent number 6,385,703
- Issue date May 7, 2002
- Intel Corporation
- Narendra S. Khandekar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for maintaining cache coherency in a memory sy...
- Patent number 6,314,497
- Issue date Nov 6, 2001
- Intel Corporation
- Steve J. Clohset
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for communicating a configuration sequence thr...
- Patent number 6,243,810
- Issue date Jun 5, 2001
- Intel Corporation
- Narendra N. Khandekar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for controlling data transfer between a synchr...
- Patent number 6,243,768
- Issue date Jun 5, 2001
- Intel Corporation
- Narendra S. Khandekar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Arbitration methods to avoid deadlock and livelock when performing...
- Patent number 6,202,112
- Issue date Mar 13, 2001
- Intel Corporation
- Ashish Gadagkar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for decoupling internal latencies of a bus bri...
- Patent number 6,173,354
- Issue date Jan 9, 2001
- Intel Corporation
- Narendra Khandekar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
AGP read and CPU wire coherency
- Patent number 6,157,397
- Issue date Dec 5, 2000
- Intel Corporation
- Zohar Bogin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for addressing a memory resource comprising me...
- Patent number 6,154,825
- Issue date Nov 28, 2000
- Intel Corporation
- Robert N. Murdoch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for translating signals between clock domains...
- Patent number 6,112,307
- Issue date Aug 29, 2000
- Intel Corporation
- Jasmin Ajanovic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for propagating a signal between synchronous c...
- Patent number 6,049,887
- Issue date Apr 11, 2000
- Intel Corporation
- Narendra Khandekar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for propagating a signal between synchronous c...
- Patent number 5,961,649
- Issue date Oct 5, 1999
- Intel Corporation
- Narendra Khandekar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for controlling data transfer between a synchr...
- Patent number 5,926,828
- Issue date Jul 20, 1999
- Intel Corporation
- Narendra S. Khandekar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for parallel processing of dram read request in a memory-cac...
- Patent number 5,873,119
- Issue date Feb 16, 1999
- Intel Corporation
- Narendra S. Khandekar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for asymmetric/symmetric DRAM detection
- Patent number 5,802,603
- Issue date Sep 1, 1998
- Intel Corporation
- Kuljit Bains
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for controlling linear and toggle mode burst a...
- Patent number 5,715,476
- Issue date Feb 3, 1998
- Intel Corporation
- Aniruddha Kundu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for redirecting register access requests where...
- Patent number 5,666,556
- Issue date Sep 9, 1997
- Intel Corporation
- Narendra Khandekar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fast address latch with automatic address incrementing
- Patent number 5,519,872
- Issue date May 21, 1996
- Intel Corporation
- Narendra Khandekar
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Method of addressing individual memory devices on a memory module
- Publication number 20040128429
- Publication date Jul 1, 2004
- Narendra S. Khandekar
- G11 - INFORMATION STORAGE
Information Patent Application
Method and apparatus for controlling power states in a memory devic...
- Publication number 20030182588
- Publication date Sep 25, 2003
- James M. Dodd
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and method for encoding auto-precharge
- Publication number 20030142557
- Publication date Jul 31, 2003
- Narendra S. Khandekar
- G11 - INFORMATION STORAGE
Information Patent Application
Apparatus and method to track command signal occurrence for dram da...
- Publication number 20030145161
- Publication date Jul 31, 2003
- Narendra S. Khandekar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and method to track flag transitions for DRAM data transfer
- Publication number 20030145156
- Publication date Jul 31, 2003
- Narendra S. Khandekar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for resource sharing in a multi-processor system
- Publication number 20030140189
- Publication date Jul 24, 2003
- Zohar Bogin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory bus termination with memory unit having termination control
- Publication number 20030126338
- Publication date Jul 3, 2003
- James M. Dodd
- G06 - COMPUTING CALCULATING COUNTING

Narendra Khandekar

Person

Patents Grantslast 30 patents

Memory buffer device integrating refresh logic

Method and apparatus for controlling power states in a memory devic...

Memory bus termination with memory unit having termination control

Apparatus and method to track flag transitions for DRAM data transfer

Apparatus and method to track command signal occurrence for DRAM da...

Method of addressing individual memory devices on a memory module

Apparatus and method for encoding auto-precharge

Memory buffer arrangement

Method and apparatus for automatically detecting whether a memory u...

Method and apparatus for resource sharing in a multi-processor system

Speculative request pointer advance for fast back-to-back reads

Apparatus and method for maintaining cache coherency in a memory sy...

Method and apparatus for communicating a configuration sequence thr...

Method and apparatus for controlling data transfer between a synchr...

Arbitration methods to avoid deadlock and livelock when performing...

Method and apparatus for decoupling internal latencies of a bus bri...

AGP read and CPU wire coherency

Method and apparatus for addressing a memory resource comprising me...

Method and apparatus for translating signals between clock domains...

Method and apparatus for propagating a signal between synchronous c...

Method and apparatus for propagating a signal between synchronous c...

Method and apparatus for controlling data transfer between a synchr...

Method for parallel processing of dram read request in a memory-cac...

Method and apparatus for asymmetric/symmetric DRAM detection

Method and apparatus for controlling linear and toggle mode burst a...

Method and apparatus for redirecting register access requests where...

Fast address latch with automatic address incrementing

Patents Applicationslast 30 patents

Method of addressing individual memory devices on a memory module

Method and apparatus for controlling power states in a memory devic...

Apparatus and method for encoding auto-precharge

Apparatus and method to track command signal occurrence for dram da...

Apparatus and method to track flag transitions for DRAM data transfer

Method and apparatus for resource sharing in a multi-processor system

Memory bus termination with memory unit having termination control