Neal Callan

Person

Oswego, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Computational wafer inspection
- Patent number 12,067,340
- Issue date Aug 20, 2024
- ASML Netherlands B.V.
- Christophe David Fouquet
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computational wafer inspection
- Patent number 11,080,459
- Issue date Aug 3, 2021
- ASML Netherlands B.V.
- Christophe David Fouquet
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computational wafer inspection
- Patent number 10,579,772
- Issue date Mar 3, 2020
- ASML Netherlands B.V.
- Christophe David Fouquet
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computational wafer inspection
- Patent number 9,990,462
- Issue date Jun 5, 2018
- ASML Netherlands B.V.
- Christophe David Fouquet
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Computational wafer inspection
- Patent number 9,507,907
- Issue date Nov 29, 2016
- ASML Netherlands B.V.
- Christophe David Fouquet
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Maskless vortex phase shift optical direct write lithography
- Patent number 9,188,848
- Issue date Nov 17, 2015
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Nicholas K. Eib
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Maskless vortex phase shift optical direct write lithography
- Patent number 8,377,633
- Issue date Feb 19, 2013
- LSI Corporation
- Nicholas K. Eib
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Maskless vortex phase shift optical direct write lithography
- Patent number 8,057,963
- Issue date Nov 15, 2011
- LSI Corporation
- Nicholas K. Eib
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method and system for reducing inter-layer capacitance in integrate...
- Patent number 8,015,540
- Issue date Sep 6, 2011
- LSI Corporation
- Kunal N. Taravade
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Optimized mirror design for optical direct write
- Patent number 7,738,078
- Issue date Jun 15, 2010
- LSI Corporation
- Nicholas K. Eib
- G02 - OPTICS
Information Patent Grant
Lithographic apparatus and device manufacturing method, an integrat...
- Patent number 7,499,146
- Issue date Mar 3, 2009
- ASML Netherlands B.V.
- Kars Zeger Troost
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method and system for reducing inter-layer capacitance in integrate...
- Patent number 7,396,760
- Issue date Jul 8, 2008
- LSI Corporation
- Kunal N. Taravade
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for post-OPC multi layer overlay quality inspection
- Patent number 7,376,260
- Issue date May 20, 2008
- LSI Logic Corporation
- Neal Callan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Process and apparatus for achieving single exposure pattern transfe...
- Patent number 7,372,547
- Issue date May 13, 2008
- LSI Corporation
- Nicholas K. Eib
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Process window compliant corrections of design layout
- Patent number 7,313,508
- Issue date Dec 25, 2007
- LSI Corporation
- Ebo Croffie
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Optimized mirror design for optical direct write
- Patent number 7,270,942
- Issue date Sep 18, 2007
- LSI Corporation
- Nicholas K. Eib
- G02 - OPTICS
Information Patent Grant
Process and apparatus for generating a strong phase shift optical p...
- Patent number 7,189,498
- Issue date Mar 13, 2007
- LSI Logic Corporation
- Nicholas K. Eib
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Mask defect analysis for both horizontal and vertical processing ef...
- Patent number 7,149,340
- Issue date Dec 12, 2006
- LSI Logic Corporation
- Paul Filseth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Chromeless phase shift mask
- Patent number 7,005,217
- Issue date Feb 28, 2006
- LSI Logic Corporation
- George E. Bailey
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Chromeless phase shift mask using non-linear optical materials
- Patent number 6,864,020
- Issue date Mar 8, 2005
- LSI Logic Corporation
- Kunal Taravade
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Wafer process critical dimension, alignment, and registration analy...
- Patent number 6,782,525
- Issue date Aug 24, 2004
- LSI Logic Corporation
- Mario Garza
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Device parameter and gate performance simulation based on wafer ima...
- Patent number 6,775,818
- Issue date Aug 10, 2004
- LSI Logic Corporation
- Kunal Taravade
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
COMPUTATIONAL WAFER INSPECTION
- Publication number 20240403537
- Publication date Dec 5, 2024
- ASML NETHERLANDS B.V.
- Christophe David FOUQUET
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTATIONAL WAFER INSPECTION
- Publication number 20210357570
- Publication date Nov 18, 2021
- ASML NETHERLANDS B.V.
- Christophe David FOUQUET
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTATIONAL WAFER INSPECTION
- Publication number 20200218849
- Publication date Jul 9, 2020
- ASML NETHERLANDS B.V.
- Christophe David FOUQUET
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTATIONAL WAFER INSPECTION
- Publication number 20180365369
- Publication date Dec 20, 2018
- ASML NETHERLANDS B.V.
- Christophe David FOUQUET
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTATIONAL WAFER INSPECTION
- Publication number 20170046473
- Publication date Feb 16, 2017
- ASML NETHERLANDS B.V.
- Christophe David FOUQUET
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTATIONAL WAFER INSPECTION
- Publication number 20150356233
- Publication date Dec 10, 2015
- ASML NETHERLANDS B.V.
- Christophe David FOUQUET
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Maskless Vortex Phase Shift Optical Direct Write Lithography
- Publication number 20130107240
- Publication date May 2, 2013
- LSI Corporation
- Nicholas K. Eib
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Maskless Vortex Phase Shift Optical Direct Write Lithography
- Publication number 20120038896
- Publication date Feb 16, 2012
- LSI Corporation
- Nicholas K. Eib
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Method and system for reducing inter-layer capacitance in integrate...
- Publication number 20080235643
- Publication date Sep 25, 2008
- LSI Logic Corporation
- Kunal N. Taravade
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
OPTIMIZED MIRROR DESIGN FOR OPTICAL DIRECT WRITE
- Publication number 20070247604
- Publication date Oct 25, 2007
- LSI Logic Corporation
- Nicholas K. Eib
- G02 - OPTICS
Information Patent Application
Lithographic apparatus and device manufacturing method, an integrat...
- Publication number 20060203220
- Publication date Sep 14, 2006
- ASML NETHERLANDS B.V.
- Kars Zeger Troost
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Method and system for reducing inter-layer capacitance in integrate...
- Publication number 20060105564
- Publication date May 18, 2006
- Kunal N. Taravade
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Maskless vortex phase shift optical direct write lithography
- Publication number 20050275814
- Publication date Dec 15, 2005
- LSI Logic Corporation, a Delaware Corporation
- Nicholas K. Eib
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Process and apparatus for achieving single exposure pattern transfe...
- Publication number 20050237508
- Publication date Oct 27, 2005
- LSI Logic Corporation
- Nicholas K. Eib
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Process and apparatus for applying apodization to maskless optical...
- Publication number 20050151949
- Publication date Jul 14, 2005
- LSI Logic Corporation
- Nicholas K. Eib
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Process and apparatus for generating a strong phase shift optical p...
- Publication number 20050153246
- Publication date Jul 14, 2005
- LGI Logic Corporation
- Nicholas K. Eib
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Method for post-OPC multi layer overlay quality inspection
- Publication number 20050100802
- Publication date May 12, 2005
- Neal Callan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Optimized mirror design for optical direct write
- Publication number 20050088640
- Publication date Apr 28, 2005
- LSI Logic Corporation
- Nicholas K. Eib
- G02 - OPTICS
Information Patent Application
Attenuated film with etched quartz phase shift mask
- Publication number 20050019673
- Publication date Jan 27, 2005
- Kunal Taravade
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Chromeless phase shift mask
- Publication number 20040197674
- Publication date Oct 7, 2004
- George E. Bailey
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Process window compliant corrections of design layout
- Publication number 20040128118
- Publication date Jul 1, 2004
- Ebo Croffie
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Mask defect analysis for both horizontal and vertical processing ef...
- Publication number 20040057610
- Publication date Mar 25, 2004
- Paul Filseth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Wafer process critical dimension, alignment, and registration analy...
- Publication number 20040049760
- Publication date Mar 11, 2004
- Mario Garza
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Device parameter and gate performance simulation based on wafer ima...
- Publication number 20040040000
- Publication date Feb 26, 2004
- Kunal Taravade
- G06 - COMPUTING CALCULATING COUNTING

Neal Callan

Person

Patents Grantslast 30 patents

Computational wafer inspection

Computational wafer inspection

Computational wafer inspection

Computational wafer inspection

Computational wafer inspection

Maskless vortex phase shift optical direct write lithography

Maskless vortex phase shift optical direct write lithography

Maskless vortex phase shift optical direct write lithography

Method and system for reducing inter-layer capacitance in integrate...

Optimized mirror design for optical direct write

Lithographic apparatus and device manufacturing method, an integrat...

Method and system for reducing inter-layer capacitance in integrate...

Method for post-OPC multi layer overlay quality inspection

Process and apparatus for achieving single exposure pattern transfe...

Process window compliant corrections of design layout

Optimized mirror design for optical direct write

Process and apparatus for generating a strong phase shift optical p...

Mask defect analysis for both horizontal and vertical processing ef...

Chromeless phase shift mask

Chromeless phase shift mask using non-linear optical materials

Wafer process critical dimension, alignment, and registration analy...

Device parameter and gate performance simulation based on wafer ima...

Patents Applicationslast 30 patents

COMPUTATIONAL WAFER INSPECTION

COMPUTATIONAL WAFER INSPECTION

COMPUTATIONAL WAFER INSPECTION

COMPUTATIONAL WAFER INSPECTION

COMPUTATIONAL WAFER INSPECTION

COMPUTATIONAL WAFER INSPECTION

Maskless Vortex Phase Shift Optical Direct Write Lithography

Maskless Vortex Phase Shift Optical Direct Write Lithography

Method and system for reducing inter-layer capacitance in integrate...

OPTIMIZED MIRROR DESIGN FOR OPTICAL DIRECT WRITE

Lithographic apparatus and device manufacturing method, an integrat...

Method and system for reducing inter-layer capacitance in integrate...

Maskless vortex phase shift optical direct write lithography

Process and apparatus for achieving single exposure pattern transfe...

Process and apparatus for applying apodization to maskless optical...

Process and apparatus for generating a strong phase shift optical p...

Method for post-OPC multi layer overlay quality inspection

Optimized mirror design for optical direct write

Attenuated film with etched quartz phase shift mask

Chromeless phase shift mask

Process window compliant corrections of design layout

Mask defect analysis for both horizontal and vertical processing ef...

Wafer process critical dimension, alignment, and registration analy...

Device parameter and gate performance simulation based on wafer ima...