Niladri Narayan Mojumder

Person

San Diego, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method and apparatus for integrated circuit monitoring and preventi...
- Patent number 10,591,531
- Issue date Mar 17, 2020
- QUALCOMM Incorporated
- Rajit Chandra
- G01 - MEASURING TESTING
Information Patent Grant
Metal layers for a three-port bit cell
- Patent number 10,141,317
- Issue date Nov 27, 2018
- QUALCOMM Incorporated
- Niladri Narayan Mojumder
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Static random access memory (SRAM) bit cells with wordline landing...
- Patent number 9,876,017
- Issue date Jan 23, 2018
- QUALCOMM Incorporated
- Niladri Narayan Mojumder
- G11 - INFORMATION STORAGE
Information Patent Grant
Static random-access memory (SRAM) sensor for bias temperature inst...
- Patent number 9,812,188
- Issue date Nov 7, 2017
- QUALCOMM Incorporated
- Niladri Narayan Mojumder
- G11 - INFORMATION STORAGE
Information Patent Grant
Static random access memory (SRAM) bit cells with wordlines on sepa...
- Patent number 9,806,083
- Issue date Oct 31, 2017
- QUALCOMM Incorporated
- Niladri Narayan Mojumder
- G11 - INFORMATION STORAGE
Information Patent Grant
Self-aligned structure
- Patent number 9,799,560
- Issue date Oct 24, 2017
- QUALCOMM Incorporated
- Stanley Seungchul Song
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory device with adaptive voltage scaling based on error information
- Patent number 9,786,356
- Issue date Oct 10, 2017
- QUALCOMM Incorporated
- Zhongze Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit devices and methods
- Patent number 9,721,891
- Issue date Aug 1, 2017
- QUALCOMM Incorporated
- Jeffrey Junhao Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reduced height M1 metal lines for local on-chip routing
- Patent number 9,666,481
- Issue date May 30, 2017
- QUALCOMM Incorporated
- Stanley Seungchul Song
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Voltage scaling for holistic energy management
- Patent number 9,660,649
- Issue date May 23, 2017
- QUALCOMM Incorporated
- Niladri Narayan Mojumder
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated circuit devices and methods
- Patent number 9,543,248
- Issue date Jan 10, 2017
- QUALCOMM Incorporated
- Jeffrey Junhao Xu
- B29 - WORKING OF PLASTICS WORKING OF SUBSTANCES IN A PLASTIC STATE, IN GENERAL
Information Patent Grant
User experience based management technique for mobile system-on-chips
- Patent number 9,542,518
- Issue date Jan 10, 2017
- QUALCOMM Incorporated
- Niladri Narayan Mojumder
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Three-port bit cell having increased width
- Patent number 9,536,596
- Issue date Jan 3, 2017
- QUALCOMM Incorporated
- Niladri Narayan Mojumder
- G11 - INFORMATION STORAGE
Information Patent Grant
Metal layers for a three-port bit cell
- Patent number 9,524,972
- Issue date Dec 20, 2016
- QUALCOMM Incorporated
- Niladri Narayan Mojumder
- G11 - INFORMATION STORAGE
Information Patent Grant
Shared global read and write word lines
- Patent number 9,455,026
- Issue date Sep 27, 2016
- QUALCOMM Incorporated
- Niladri Narayan Mojumder
- G11 - INFORMATION STORAGE
Information Patent Grant
Volatile memory and one-time program (OTP) compatible memory cell a...
- Patent number 9,449,709
- Issue date Sep 20, 2016
- QUALCOMM Incorporated
- Xia Li
- G11 - INFORMATION STORAGE
Information Patent Grant
Static random access memory (SRAM) arrays having substantially cons...
- Patent number 9,424,909
- Issue date Aug 23, 2016
- QUALCOMM Incorporated
- Niladri Narayan Mojumder
- G11 - INFORMATION STORAGE
Information Patent Grant
Static random-access memory (SRAM) array
- Patent number 9,379,014
- Issue date Jun 28, 2016
- QUALCOMM Incorporated
- Niladri Narayan Mojumder
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Static random access memory (SRAM) arrays having substantially cons...
- Patent number 9,373,387
- Issue date Jun 21, 2016
- QUALCOMM Incorporated
- Niladri Narayan Mojumder
- G11 - INFORMATION STORAGE
Information Patent Grant
Reduced height M1 metal lines for local on-chip routing
- Patent number 9,349,686
- Issue date May 24, 2016
- QUALCOMM Incorporated
- Stanley Seungchul Song
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Silicon germanium read port for a static random access memory regis...
- Patent number 9,336,864
- Issue date May 10, 2016
- QUALCOMM Incorporated
- Niladri Mojumder
- G11 - INFORMATION STORAGE
Information Patent Grant
High density static random access memory array having advanced meta...
- Patent number 9,318,564
- Issue date Apr 19, 2016
- QUALCOMM Incorporated
- Niladri Mojumder
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Heterogeneous channel material integration into wafer
- Patent number 9,257,407
- Issue date Feb 9, 2016
- QUALCOMM Incorporated
- Stanley Seungchul Song
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Priority based layout versus schematic (LVS)
- Patent number 8,966,418
- Issue date Feb 24, 2015
- GLOBALFOUNDRIES Inc.
- Niladri Mojumder
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METAL LAYERS FOR A THREE-PORT BIT CELL
- Publication number 20190035796
- Publication date Jan 31, 2019
- QUALCOMM Incorporated
- Niladri Narayan Mojumder
- G11 - INFORMATION STORAGE
Information Patent Application
Circuits and Methods Providing Core Scheduling in Response to Aging...
- Publication number 20180143853
- Publication date May 24, 2018
- QUALCOMM Incorporated
- Mehdi Saeidi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT DEVICES AND METHODS
- Publication number 20170092587
- Publication date Mar 30, 2017
- Qualcomm Incorporated
- Jeffrey Junhao Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METAL LAYERS FOR A THREE-PORT BIT CELL
- Publication number 20170062439
- Publication date Mar 2, 2017
- QUALCOMM Incorporated
- Niladri Narayan Mojumder
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS FOR INTEGRATED CIRCUIT MONITORING AND PREVENTI...
- Publication number 20160363623
- Publication date Dec 15, 2016
- QUALCOMM Incorporated
- Rajit CHANDRA
- G01 - MEASURING TESTING
Information Patent Application
SELF-ALIGNED STRUCTURE
- Publication number 20160293485
- Publication date Oct 6, 2016
- QUALCOMM Incorporated
- Stanley Seungchul Song
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STATIC RANDOM-ACCESS MEMORY (SRAM) SENSOR
- Publication number 20160247554
- Publication date Aug 25, 2016
- QUALCOMM Incorporated
- Niladri Narayan Mojumder
- G11 - INFORMATION STORAGE
Information Patent Application
REDUCED HEIGHT M1 METAL LINES FOR LOCAL ON-CHIP ROUTING
- Publication number 20160240437
- Publication date Aug 18, 2016
- QUALCOMM Incorporated
- Stanley Seungchul SONG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METAL LAYERS FOR A THREE-PORT BIT CELL
- Publication number 20160240539
- Publication date Aug 18, 2016
- QUALCOMM Incorporated
- Niladri Narayan Mojumder
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT DEVICE INCLUDING MULTIPLE VIA CONNECTORS AND A M...
- Publication number 20160233159
- Publication date Aug 11, 2016
- QUALCOMM Incorporated
- Stanley Seungchul Song
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY DEVICE WITH ADAPTIVE VOLTAGE SCALING BASED ON ERROR INFORMATION
- Publication number 20160225436
- Publication date Aug 4, 2016
- QUALCOMM Incorporated
- Zhongze Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT DEVICES AND METHODS
- Publication number 20160211216
- Publication date Jul 21, 2016
- QUALCOMM Incorporated
- Jeffrey Junhao Xu
- B33 - ADDITIVE MANUFACTURING TECHNOLOGY
Information Patent Application
STATIC RANDOM ACCESS MEMORY (SRAM) BIT CELLS WITH WORDLINES ON SEPA...
- Publication number 20160163713
- Publication date Jun 9, 2016
- QUALCOMM Incorporated
- Niladri Narayan Mojumder
- G11 - INFORMATION STORAGE
Information Patent Application
STATIC RANDOM ACCESS MEMORY (SRAM) BIT CELLS WITH WORDLINE LANDING...
- Publication number 20160163714
- Publication date Jun 9, 2016
- QUALCOMM Incorporated
- Niladri Narayan Mojumder
- G11 - INFORMATION STORAGE
Information Patent Application
STRAPPED CONTACT IN A SEMICONDUCTOR DEVICE
- Publication number 20160163646
- Publication date Jun 9, 2016
- QUALCOMM Incorporated
- Haining Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
USER EXPERIENCE BASED MANAGEMENT TECHNIQUE FOR MOBILE SYSTEM-ON-CHIPS
- Publication number 20160140275
- Publication date May 19, 2016
- QUALCOMM Incorporated
- Niladri Narayan Mojumder
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VOLTAGE SCALING FOR HOLISTIC ENERGY MANAGEMENT
- Publication number 20160142054
- Publication date May 19, 2016
- QUALCOMM Incorporated
- Niladri Narayan Mojumder
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SHARED GLOBAL READ AND WRITE WORD LINES
- Publication number 20160141021
- Publication date May 19, 2016
- QUALCOMM Incorporated
- Niladri Narayan Mojumder
- G11 - INFORMATION STORAGE
Information Patent Application
FIN FIELD-EFFECT TRANSISTOR STATIC RANDOM ACCESS MEMORY DEVICES WIT...
- Publication number 20160133634
- Publication date May 12, 2016
- QUALCOMM Incorporated
- Niladri Narayan MOJUMDER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SILICON GERMANIUM READ PORT FOR A STATIC RANDOM ACCESS MEMORY REGIS...
- Publication number 20160064068
- Publication date Mar 3, 2016
- Niladri Mojumder
- G11 - INFORMATION STORAGE
Information Patent Application
THREE-PORT BIT CELL HAVING INCREASED WIDTH
- Publication number 20160064067
- Publication date Mar 3, 2016
- QUALCOMM Incorporated
- Niladri Narayan Mojumder
- G11 - INFORMATION STORAGE
Information Patent Application
FIN FIELD-EFFECT TRANSISTOR STATIC RANDOM ACCESS MEMORY DEVICES WIT...
- Publication number 20160043092
- Publication date Feb 11, 2016
- QUALCOMM Incorporated
- Niladri Narayan MOJUMDER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH DENSITY STATIC RANDOM ACCESS MEMORY ARRAY HAVING ADVANCED META...
- Publication number 20150333131
- Publication date Nov 19, 2015
- QUALCOMM Incorporated
- Niladri MOJUMDER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH DENSITY SRAM ARRAY DESIGN WITH SKIPPED, INTER-LAYER CONDUCTIVE...
- Publication number 20150325514
- Publication date Nov 12, 2015
- QUALCOMM Incorporated
- Niladri Narayan MOJUMDER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DATA PATH SYSTEM ON CHIP DESIGN METHODOLOGY
- Publication number 20150317426
- Publication date Nov 5, 2015
- QUALCOMM Incorporated
- Stanley Seungchul SONG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCED HEIGHT M1 METAL LINES FOR LOCAL ON-CHIP ROUTING
- Publication number 20150262930
- Publication date Sep 17, 2015
- QUALCOMM Incorporated
- Stanley Seungchul SONG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HETEROGENEOUS CHANNEL MATERIAL INTEGRATION INTO WAFER
- Publication number 20150115473
- Publication date Apr 30, 2015
- QUALCOMM Incorporated
- Stanley Seungchul SONG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PRIORITY BASED LAYOUT VERSUS SCHEMATIC (LVS)
- Publication number 20140282330
- Publication date Sep 18, 2014
- GLOBALFOUNDRIES INC.
- Niladri MOJUMDER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY CELL WITH ASYMMETRIC READ PORT TRANSISTORS
- Publication number 20130341723
- Publication date Dec 26, 2013
- GLOBALFOUNDRIES INC.
- Niladri N. Mojumder
- H01 - BASIC ELECTRIC ELEMENTS

Niladri Narayan Mojumder

Person

Patents Grantslast 30 patents

Method and apparatus for integrated circuit monitoring and preventi...

Metal layers for a three-port bit cell

Static random access memory (SRAM) bit cells with wordline landing...

Static random-access memory (SRAM) sensor for bias temperature inst...

Static random access memory (SRAM) bit cells with wordlines on sepa...

Self-aligned structure

Memory device with adaptive voltage scaling based on error information

Integrated circuit devices and methods

Reduced height M1 metal lines for local on-chip routing

Voltage scaling for holistic energy management

Integrated circuit devices and methods

User experience based management technique for mobile system-on-chips

Three-port bit cell having increased width

Metal layers for a three-port bit cell

Shared global read and write word lines

Volatile memory and one-time program (OTP) compatible memory cell a...

Static random access memory (SRAM) arrays having substantially cons...

Static random-access memory (SRAM) array

Static random access memory (SRAM) arrays having substantially cons...

Reduced height M1 metal lines for local on-chip routing

Silicon germanium read port for a static random access memory regis...

High density static random access memory array having advanced meta...

Heterogeneous channel material integration into wafer

Priority based layout versus schematic (LVS)

Patents Applicationslast 30 patents

METAL LAYERS FOR A THREE-PORT BIT CELL

Circuits and Methods Providing Core Scheduling in Response to Aging...

INTEGRATED CIRCUIT DEVICES AND METHODS

METAL LAYERS FOR A THREE-PORT BIT CELL

METHOD AND APPARATUS FOR INTEGRATED CIRCUIT MONITORING AND PREVENTI...

SELF-ALIGNED STRUCTURE

STATIC RANDOM-ACCESS MEMORY (SRAM) SENSOR

REDUCED HEIGHT M1 METAL LINES FOR LOCAL ON-CHIP ROUTING

METAL LAYERS FOR A THREE-PORT BIT CELL

INTEGRATED CIRCUIT DEVICE INCLUDING MULTIPLE VIA CONNECTORS AND A M...

MEMORY DEVICE WITH ADAPTIVE VOLTAGE SCALING BASED ON ERROR INFORMATION

INTEGRATED CIRCUIT DEVICES AND METHODS

STATIC RANDOM ACCESS MEMORY (SRAM) BIT CELLS WITH WORDLINES ON SEPA...

STATIC RANDOM ACCESS MEMORY (SRAM) BIT CELLS WITH WORDLINE LANDING...

STRAPPED CONTACT IN A SEMICONDUCTOR DEVICE

USER EXPERIENCE BASED MANAGEMENT TECHNIQUE FOR MOBILE SYSTEM-ON-CHIPS

VOLTAGE SCALING FOR HOLISTIC ENERGY MANAGEMENT

SHARED GLOBAL READ AND WRITE WORD LINES

FIN FIELD-EFFECT TRANSISTOR STATIC RANDOM ACCESS MEMORY DEVICES WIT...

SILICON GERMANIUM READ PORT FOR A STATIC RANDOM ACCESS MEMORY REGIS...

THREE-PORT BIT CELL HAVING INCREASED WIDTH

FIN FIELD-EFFECT TRANSISTOR STATIC RANDOM ACCESS MEMORY DEVICES WIT...

HIGH DENSITY STATIC RANDOM ACCESS MEMORY ARRAY HAVING ADVANCED META...

HIGH DENSITY SRAM ARRAY DESIGN WITH SKIPPED, INTER-LAYER CONDUCTIVE...

DATA PATH SYSTEM ON CHIP DESIGN METHODOLOGY

REDUCED HEIGHT M1 METAL LINES FOR LOCAL ON-CHIP ROUTING

HETEROGENEOUS CHANNEL MATERIAL INTEGRATION INTO WAFER

PRIORITY BASED LAYOUT VERSUS SCHEMATIC (LVS)

MEMORY CELL WITH ASYMMETRIC READ PORT TRANSISTORS