Nirmal Raj Saxena

Person

Los Altos Hills, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Using neural networks to perform fault detection in autonomous driv...
- Patent number 12,271,194
- Issue date Apr 8, 2025
- NVIDIA Corporation
- Richard Bramley
- G05 - CONTROLLING REGULATING
Information Patent Grant
Near-memory compute module
- Patent number 12,204,758
- Issue date Jan 21, 2025
- RAMBUS INC.
- David Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Single-cycle byte correcting and multi-byte detecting error code
- Patent number 12,149,259
- Issue date Nov 19, 2024
- NVIDIA Corporation
- Michael Brendan Sullivan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Techniques for recovering from errors when executing software appli...
- Patent number 11,874,742
- Issue date Jan 16, 2024
- NVIDIA Corporation
- Saurabh Hukerikar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for storing data to enhance recovery and detection of da...
- Patent number 11,789,811
- Issue date Oct 17, 2023
- NVIDIA Corporation
- Peter Mills
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parity check decoding
- Patent number 11,791,938
- Issue date Oct 17, 2023
- NVIDIA Corporation
- Victor Podlozhnyuk
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Near-memory compute module
- Patent number 11,733,870
- Issue date Aug 22, 2023
- RAMBUS INC.
- David Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Liveness as a factor to evaluate memory vulnerability to soft errors
- Patent number 11,720,472
- Issue date Aug 8, 2023
- NVIDIA Corporation
- Richard Gavin Bramley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error containment for enabling local checkpoint and recovery
- Patent number 11,720,440
- Issue date Aug 8, 2023
- NVIDIA Corporation
- Naveen Cherukuri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Using neural networks to perform fault detection in autonomous driv...
- Patent number 11,592,828
- Issue date Feb 28, 2023
- NVIDIA Corporation
- Richard Bramley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Securing against errors in an error correcting code (ECC) implement...
- Patent number 11,494,265
- Issue date Nov 8, 2022
- NVIDIA Corporation
- Nirmal R. Saxena
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for storing data to enhance recovery and detection of da...
- Patent number 11,474,897
- Issue date Oct 18, 2022
- NVIDIA Corporation
- Peter Mills
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Determining diagnostic coverage for memory using redundant execution
- Patent number 11,188,442
- Issue date Nov 30, 2021
- NVIDIA Corporation
- Richard Gavin Bramley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Detection of hazardous driving using machine learning
- Patent number 11,150,663
- Issue date Oct 19, 2021
- NVIDIA Corporation
- Philip Shirvani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Securing against errors in an error correcting code (ECC) implement...
- Patent number 10,908,995
- Issue date Feb 2, 2021
- NVIDIA Corporation
- Nirmal R. Saxena
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Liveness as a factor to evaluate memory vulnerability to soft errors
- Patent number 10,691,572
- Issue date Jun 23, 2020
- NVIDIA Corporation
- Richard Gavin Bramley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Near-memory compute module
- Patent number 10,185,499
- Issue date Jan 22, 2019
- Rambus Inc.
- David Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technique for performing memory access operations via texture hardware
- Patent number 9,720,858
- Issue date Aug 1, 2017
- NVIDIA Corporation
- Brian Fahs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technique for performing memory access operations via texture hardware
- Patent number 9,697,006
- Issue date Jul 4, 2017
- NVIDIA Corporation
- Brian Fahs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
PCIE lane aggregation over a high speed link
- Patent number 9,430,437
- Issue date Aug 30, 2016
- Inphi Corporation
- Sreenivas Krishnan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Technique for accessing content-addressable memory
- Patent number 9,348,762
- Issue date May 24, 2016
- NVIDIA Corporation
- Brian Fahs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory centric computing
- Patent number 9,348,539
- Issue date May 24, 2016
- Inphi Corporation
- Nirmal Raj Saxena
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Isolated shared memory architecture (iSMA)
- Patent number 9,250,831
- Issue date Feb 2, 2016
- Inphi Corporation
- Nirmal Raj Saxena
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Content matching using a multi-hash function for replacement of a f...
- Patent number 9,195,607
- Issue date Nov 24, 2015
- Inphi Corporation
- Nirmal Saxena
- G11 - INFORMATION STORAGE
Information Patent Grant
Vertical error correction code for DRAM memory
- Patent number 8,996,960
- Issue date Mar 31, 2015
- Inphi Corporation
- Nirmal Raj Saxena
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Techniques for storing ECC checkbits in a level two cache
- Patent number 8,984,372
- Issue date Mar 17, 2015
- NVIDIA Corporation
- Wishwesh Anil Gandhi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compression of content entries in storage for replacing faulty memo...
- Patent number 8,885,426
- Issue date Nov 11, 2014
- Inphi Corporation
- Andrew Burstein
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and system for fast two bit error correction
- Patent number 8,683,293
- Issue date Mar 25, 2014
- NVIDIA Corporation
- Nirmal Saxena
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
RAID-6 computation system and method
- Patent number 8,296,515
- Issue date Oct 23, 2012
- NVIDIA Corporation
- Nirmal Raj Saxena
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Raid-6 computation system and method
- Patent number 8,037,391
- Issue date Oct 11, 2011
- NVIDIA Corporation
- Cyndi Jung
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
PARITY CHECK DECODING
- Publication number 20240430037
- Publication date Dec 26, 2024
- NVIDIA Corporation
- Victor Podlozhnyuk
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
NEAR-MEMORY COMPUTE MODULE
- Publication number 20240028207
- Publication date Jan 25, 2024
- Rambus Inc.
- David WANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
USING NEURAL NETWORKS TO PERFORM FAULT DETECTION IN AUTONOMOUS DRIV...
- Publication number 20230152805
- Publication date May 18, 2023
- NVIDIA Corporation
- Richard Bramley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SINGLE-CYCLE BYTE CORRECTING AND MULTI-BYTE DETECTING ERROR CODE
- Publication number 20230089736
- Publication date Mar 23, 2023
- NVIDIA Corporation
- Michael Brendan Sullivan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ERROR CONTAINMENT FOR ENABLING LOCAL CHECKPOINT AND RECOVERY
- Publication number 20230011863
- Publication date Jan 12, 2023
- NVIDIA Corporation
- NAVEEN CHERUKURI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR RECOVERING FROM ERRORS WHEN EXECUTING SOFTWARE APPLI...
- Publication number 20220342761
- Publication date Oct 27, 2022
- NVIDIA Corporation
- Saurabh HUKERIKAR
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR STORING DATA TO ENHANCE RECOVERY AND DETECTION OF DA...
- Publication number 20220276924
- Publication date Sep 1, 2022
- NVIDIA Corporation
- Peter Mills
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LIVENESS AS A FACTOR TO EVALUATE MEMORY VULNERABILITY TO SOFT ERRORS
- Publication number 20220114075
- Publication date Apr 14, 2022
- NVIDIA Corporation
- Richard Gavin Bramley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DETECTION OF HAZARDOUS DRIVING USING MACHINE LEARNING
- Publication number 20220083068
- Publication date Mar 17, 2022
- NVIDIA Corporation
- Philip SHIRVANI
- G05 - CONTROLLING REGULATING
Information Patent Application
TECHNIQUE FOR PERFORMING BIT-LINEAR TRANSFORMATIONS
- Publication number 20210279055
- Publication date Sep 9, 2021
- NVIDIA Corporation
- Nirmal Saxena
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
USING NEURAL NETWORKS TO PERFORM FAULT DETECTION IN AUTONOMOUS DRIV...
- Publication number 20210223780
- Publication date Jul 22, 2021
- NVIDIA Corporation
- Richard Bramley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SECURING AGAINST ERRORS IN AN ERROR CORRECTING CODE (ECC) IMPLEMENT...
- Publication number 20210124644
- Publication date Apr 29, 2021
- NVIDIA Corporation
- Nirmal R. Saxena
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARITY CHECK DECODING
- Publication number 20210099251
- Publication date Apr 1, 2021
- NVIDIA Corporation
- Victor Podlozhnyuk
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TECHNIQUES FOR STORING DATA TO ENHANCE RECOVERY AND DETECTION OF DA...
- Publication number 20200293395
- Publication date Sep 17, 2020
- NVIDIA Corporation
- Peter Mills
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DETERMINING DIAGNOSTIC COVERAGE FOR MEMORY USING REDUNDANT EXECUTION
- Publication number 20200293425
- Publication date Sep 17, 2020
- NVIDIA Corporation
- Richard Gavin Bramley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PCIE LANE AGGREGATION OVER A HIGH SPEED LINK
- Publication number 20200142852
- Publication date May 7, 2020
- INPHI CORPORATION
- Sreenivas KRISHNAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DETECTION OF HAZARDOUS DRIVING USING MACHINE LEARNING
- Publication number 20190235515
- Publication date Aug 1, 2019
- NVIDIA Corporation
- Philip SHIRVANI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NEAR-MEMORY COMPUTE MODULE
- Publication number 20190212918
- Publication date Jul 11, 2019
- RAMBUS INC.
- David WANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SECURING AGAINST ERRORS IN AN ERROR CORRECTING CODE (ECC) IMPLEMENT...
- Publication number 20190102254
- Publication date Apr 4, 2019
- NVIDIA Corporation
- Nirmal R. Saxena
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LIVENESS AS A FACTOR TO EVALUATE MEMORY VULNERABILITY TO SOFT ERRORS
- Publication number 20190065338
- Publication date Feb 28, 2019
- NVIDIA Corporation
- Richard Gavin Bramley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PCIE LANE AGGREGATION OVER A HIGH SPEED LINK
- Publication number 20160335216
- Publication date Nov 17, 2016
- INPHI CORPORATION
- Sreenivas KRISHNAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ISOLATED SHARED MEMORY ARCHITECTURE (iSMA)
- Publication number 20160110136
- Publication date Apr 21, 2016
- INPHI CORPORATION
- Nirmal Raj SAXENA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUE FOR PERFORMING MEMORY ACCESS OPERATIONS VIA TEXTURE HARDWARE
- Publication number 20140168245
- Publication date Jun 19, 2014
- NVIDIA Corporation
- Brian Fahs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUE FOR PERFORMING MEMORY ACCESS OPERATIONS VIA TEXTURE HARDWARE
- Publication number 20140173258
- Publication date Jun 19, 2014
- NVIDIA Corporation
- Brian Fahs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUE FOR ACCESSING CONTENT-ADDRESSABLE MEMORY
- Publication number 20140173193
- Publication date Jun 19, 2014
- NVIDIA Corporation
- Brian Fahs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR STORING ECC CHECKBITS IN A LEVEL TWO CACHE
- Publication number 20140143635
- Publication date May 22, 2014
- NVIDIA Corporation
- Wishwesh Anil GANDHI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE WEAR-LEVELING TECHNIQUES
- Publication number 20110161553
- Publication date Jun 30, 2011
- NVIDIA Corporation
- Nirmal Saxena
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR FAST TWO BIT ERROR CORRECTION
- Publication number 20110145677
- Publication date Jun 16, 2011
- NVIDIA Corporation
- Nirmal Saxena
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Reconfigurable control processor for multi-protocol resilient packe...
- Publication number 20030177258
- Publication date Sep 18, 2003
- Chip Engines
- Paritosh Kulkarni
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Reconfigurable data packet header processor
- Publication number 20030118022
- Publication date Jun 26, 2003
- Chip Engines
- Paritosh Kulkarni
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Nirmal Raj Saxena

Person

Patents Grantslast 30 patents

Using neural networks to perform fault detection in autonomous driv...

Near-memory compute module

Single-cycle byte correcting and multi-byte detecting error code

Techniques for recovering from errors when executing software appli...

Techniques for storing data to enhance recovery and detection of da...

Parity check decoding

Near-memory compute module

Liveness as a factor to evaluate memory vulnerability to soft errors

Error containment for enabling local checkpoint and recovery

Using neural networks to perform fault detection in autonomous driv...

Securing against errors in an error correcting code (ECC) implement...

Techniques for storing data to enhance recovery and detection of da...

Determining diagnostic coverage for memory using redundant execution

Detection of hazardous driving using machine learning

Securing against errors in an error correcting code (ECC) implement...

Liveness as a factor to evaluate memory vulnerability to soft errors

Near-memory compute module

Technique for performing memory access operations via texture hardware

Technique for performing memory access operations via texture hardware

PCIE lane aggregation over a high speed link

Technique for accessing content-addressable memory

Memory centric computing

Isolated shared memory architecture (iSMA)

Content matching using a multi-hash function for replacement of a f...

Vertical error correction code for DRAM memory

Techniques for storing ECC checkbits in a level two cache

Compression of content entries in storage for replacing faulty memo...

Method and system for fast two bit error correction

RAID-6 computation system and method

Raid-6 computation system and method

Patents Applicationslast 30 patents

PARITY CHECK DECODING

NEAR-MEMORY COMPUTE MODULE

USING NEURAL NETWORKS TO PERFORM FAULT DETECTION IN AUTONOMOUS DRIV...

SINGLE-CYCLE BYTE CORRECTING AND MULTI-BYTE DETECTING ERROR CODE

ERROR CONTAINMENT FOR ENABLING LOCAL CHECKPOINT AND RECOVERY

TECHNIQUES FOR RECOVERING FROM ERRORS WHEN EXECUTING SOFTWARE APPLI...

TECHNIQUES FOR STORING DATA TO ENHANCE RECOVERY AND DETECTION OF DA...

LIVENESS AS A FACTOR TO EVALUATE MEMORY VULNERABILITY TO SOFT ERRORS

DETECTION OF HAZARDOUS DRIVING USING MACHINE LEARNING

TECHNIQUE FOR PERFORMING BIT-LINEAR TRANSFORMATIONS

USING NEURAL NETWORKS TO PERFORM FAULT DETECTION IN AUTONOMOUS DRIV...

SECURING AGAINST ERRORS IN AN ERROR CORRECTING CODE (ECC) IMPLEMENT...

PARITY CHECK DECODING

TECHNIQUES FOR STORING DATA TO ENHANCE RECOVERY AND DETECTION OF DA...

DETERMINING DIAGNOSTIC COVERAGE FOR MEMORY USING REDUNDANT EXECUTION

PCIE LANE AGGREGATION OVER A HIGH SPEED LINK

DETECTION OF HAZARDOUS DRIVING USING MACHINE LEARNING

NEAR-MEMORY COMPUTE MODULE

SECURING AGAINST ERRORS IN AN ERROR CORRECTING CODE (ECC) IMPLEMENT...

LIVENESS AS A FACTOR TO EVALUATE MEMORY VULNERABILITY TO SOFT ERRORS

PCIE LANE AGGREGATION OVER A HIGH SPEED LINK

ISOLATED SHARED MEMORY ARCHITECTURE (iSMA)

TECHNIQUE FOR PERFORMING MEMORY ACCESS OPERATIONS VIA TEXTURE HARDWARE

TECHNIQUE FOR PERFORMING MEMORY ACCESS OPERATIONS VIA TEXTURE HARDWARE

TECHNIQUE FOR ACCESSING CONTENT-ADDRESSABLE MEMORY

TECHNIQUES FOR STORING ECC CHECKBITS IN A LEVEL TWO CACHE

MEMORY DEVICE WEAR-LEVELING TECHNIQUES

METHOD AND SYSTEM FOR FAST TWO BIT ERROR CORRECTION

Reconfigurable control processor for multi-protocol resilient packe...

Reconfigurable data packet header processor