Nobuaki Ohtsuka

Person

Yokohama, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Nonvolatile semiconductor memory with a protect circuit
- Patent number 5,917,750
- Issue date Jun 29, 1999
- Kabushiki Kaisha Toshiba
- Tadashi Miyakawa
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device having a delay circuit for controlling...
- Patent number 5,457,661
- Issue date Oct 10, 1995
- Kabushiki Kaisha Toshiba
- Naoto Tomita
- G11 - INFORMATION STORAGE
Information Patent Grant
Nonvolatile semiconductor memory device
- Patent number 5,412,609
- Issue date May 2, 1995
- Kabushiki Kaisha Toshiba
- Nobuaki Ohtsuka
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor integrated circuit capable of preventing occurrence o...
- Patent number 5,327,392
- Issue date Jul 5, 1994
- Kabushiki Kaisha Toshiba
- Nobuaki Ohtsuka
- G11 - INFORMATION STORAGE
Information Patent Grant
Bias voltage generating circuit
- Patent number 5,296,801
- Issue date Mar 22, 1994
- Kabushiki Kaisha Toshiba
- Nobuaki Ohtsuka
- G11 - INFORMATION STORAGE
Information Patent Grant
Nonvolatile semiconductor memory device
- Patent number 5,289,053
- Issue date Feb 22, 1994
- Kabushiki Kaisha Toshiba
- Nobuaki Ohtsuka
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor integrated circuit
- Patent number 5,239,207
- Issue date Aug 24, 1993
- Kabushiki Kaisha Toshiba
- Junichi Miyamoto
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor nonvolatile memory device for controlling the potenti...
- Patent number 5,229,963
- Issue date Jul 20, 1993
- Kabushiki Kaisha Toshiba
- Nobuaki Ohtsuka
- G11 - INFORMATION STORAGE
Information Patent Grant
Cell array pattern layout for EEPROM device
- Patent number 5,105,385
- Issue date Apr 14, 1992
- Kabushiki Kaisha Toshiba
- Nobuaki Ohtsuka
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor integrated circuit including output buffer
- Patent number 5,046,048
- Issue date Sep 3, 1991
- Kabushiki Kaisha Toshiba
- Shigeru Atsumi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor memory device capable of preventing data of non-selec...
- Patent number 5,025,417
- Issue date Jun 18, 1991
- Kabushiki Kaisha Toshiba
- Junichi Miyamoto
- G11 - INFORMATION STORAGE
Information Patent Grant
Redundant semiconductor memory device
- Patent number 5,023,839
- Issue date Jun 11, 1991
- Kabushiki Kaisha Toshiba
- Noriaki Suzuki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Nonvolatile semiconductor memory having a stress test circuit
- Patent number 4,999,813
- Issue date Mar 12, 1991
- Kabushiki Kaisha Toshiba
- Nobuaki Ohtsuka
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Nonvolatile semiconductor memory device having reference potential...
- Patent number 4,974,206
- Issue date Nov 27, 1990
- Kabushiki Kaisha Toshiba
- Yumiko Iyama
- G11 - INFORMATION STORAGE
Information Patent Grant
Reference setting circuit for determining written-in content in non...
- Patent number 4,951,257
- Issue date Aug 21, 1990
- Kabushiki Kaisha Toshiba
- Keniti Imamiya
- G11 - INFORMATION STORAGE
Information Patent Grant
Nonvolatile semiconductor memory having page mode programming function
- Patent number 4,943,962
- Issue date Jul 24, 1990
- Kabushiki Kaisha Toshiba
- Keniti Imamiya
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device with a circuit for analyzing defects in...
- Patent number 4,905,194
- Issue date Feb 27, 1990
- Kabushiki Kaisha Toshiba
- Nobuaki Ohtsuka
- G11 - INFORMATION STORAGE
Information Patent Grant
High-speed write type nonvolatile semiconductor memory
- Patent number 4,897,815
- Issue date Jan 30, 1990
- Kabushiki Kaisha Toshiba
- Sumio Tanaka
- G11 - INFORMATION STORAGE
Information Patent Grant
High voltage switching circuit in a nonvolatile memory
- Patent number 4,893,275
- Issue date Jan 9, 1990
- Kabushiki Kaisha Toshiba
- Sumio Tanaka
- G11 - INFORMATION STORAGE
Information Patent Grant
Nonvolatile semiconductor memory
- Patent number 4,825,271
- Issue date Apr 25, 1989
- Kabushiki Kaisha Toshiba
- Sumio Tanaka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nonvolatile semiconductor memory device with a lightly-doped drain...
- Patent number 4,788,663
- Issue date Nov 29, 1988
- Kabushiki Kaisha Toshiba
- Sumio Tanaka
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device
- Patent number 4,694,429
- Issue date Sep 15, 1987
- Kabushiki Kaisha Toshiba
- Sumio Tanaka
- G11 - INFORMATION STORAGE

Nobuaki Ohtsuka

Person

Patents Grantslast 30 patents

Nonvolatile semiconductor memory with a protect circuit

Semiconductor memory device having a delay circuit for controlling...

Nonvolatile semiconductor memory device

Semiconductor integrated circuit capable of preventing occurrence o...

Bias voltage generating circuit

Nonvolatile semiconductor memory device

Semiconductor integrated circuit

Semiconductor nonvolatile memory device for controlling the potenti...

Cell array pattern layout for EEPROM device

Semiconductor integrated circuit including output buffer

Semiconductor memory device capable of preventing data of non-selec...

Redundant semiconductor memory device

Nonvolatile semiconductor memory having a stress test circuit

Nonvolatile semiconductor memory device having reference potential...

Reference setting circuit for determining written-in content in non...

Nonvolatile semiconductor memory having page mode programming function

Semiconductor memory device with a circuit for analyzing defects in...

High-speed write type nonvolatile semiconductor memory

High voltage switching circuit in a nonvolatile memory

Nonvolatile semiconductor memory

Nonvolatile semiconductor memory device with a lightly-doped drain...

Semiconductor memory device