Noriaki Mochida

Person

Tokyo, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Timing adjustment for data input/output buffer circuits
- Patent number 12,073,868
- Issue date Aug 27, 2024
- Micron Technology, Inc.
- Noriaki Mochida
- G11 - INFORMATION STORAGE
Information Patent Grant
Low power clock injection during idle mode operations
- Patent number 12,068,021
- Issue date Aug 20, 2024
- Micron Technology, Inc.
- Noriaki Mochida
- G11 - INFORMATION STORAGE
Information Patent Grant
Timing control circuit shared by a plurality of banks
- Patent number 10,504,582
- Issue date Dec 10, 2019
- Micron Technology, Inc.
- Noriaki Mochida
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device including subword driver circuit
- Patent number 10,332,584
- Issue date Jun 25, 2019
- Micron Technology, Inc.
- Noriaki Mochida
- G11 - INFORMATION STORAGE
Information Patent Grant
Timing control circuit shared by a plurality of banks
- Patent number 10,229,730
- Issue date Mar 12, 2019
- Micron Technology, Inc.
- Noriaki Mochida
- G11 - INFORMATION STORAGE
Information Patent Grant
Timing control circuit shared by a plurality of banks
- Patent number 9,779,800
- Issue date Oct 3, 2017
- Micron Technology, Inc.
- Noriaki Mochida
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device having hierarchically structured bit lines
- Patent number 9,666,306
- Issue date May 30, 2017
- Longitude Semiconductor S.a.r.l.
- Noriaki Mochida
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device including subword driver circuit
- Patent number 9,552,866
- Issue date Jan 24, 2017
- Micron Technology, Inc.
- Noriaki Mochida
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device having hierarchically structured bit lines
- Patent number 9,236,149
- Issue date Jan 12, 2016
- PS4 Luxco S.A.R.L.
- Noriaki Mochida
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device and data processing system
- Patent number 9,208,851
- Issue date Dec 8, 2015
- PS4 Luxco S.A.R.L.
- Noriaki Mochida
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device having hierarchical bit line structure
- Patent number 9,019,787
- Issue date Apr 28, 2015
- PS4 Luxco S.A.R.L.
- Yasuhiro Matsumoto
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device and data processing system
- Patent number 8,693,278
- Issue date Apr 8, 2014
- Noriaki Mochida
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device
- Patent number 8,649,233
- Issue date Feb 11, 2014
- Noriaki Mochida
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device
- Patent number 8,233,344
- Issue date Jul 31, 2012
- Elpida Memory, Inc.
- Noriaki Mochida
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device that can relief defective address
- Patent number 8,208,324
- Issue date Jun 26, 2012
- Elpida Memory, Inc.
- Noriaki Mochida
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device
- Patent number 7,193,915
- Issue date Mar 20, 2007
- Elpida Memory, Inc.
- Noriaki Mochida
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device with column selecting switches in hiera...
- Patent number 7,180,817
- Issue date Feb 20, 2007
- NEC Corporation
- Noriaki Mochida
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
TIMING ADJUSTMENT FOR DATA INPUT/OUTPUT BUFFER CIRCUITS
- Publication number 20230395124
- Publication date Dec 7, 2023
- Micron Technology, Inc.
- Noriaki Mochida
- G11 - INFORMATION STORAGE
Information Patent Application
LOW POWER CLOCK INJECTION DURING IDLE MODE OPERATIONS
- Publication number 20230206986
- Publication date Jun 29, 2023
- Micron Technology, Inc.
- Noriaki Mochida
- G11 - INFORMATION STORAGE
Information Patent Application
TIMING CONTROL CIRCUIT SHARED BY A PLURALITY OF BANKS
- Publication number 20190156880
- Publication date May 23, 2019
- Micron Technology, Inc.
- Noriaki Mochida
- G11 - INFORMATION STORAGE
Information Patent Application
TIMING CONTROL CIRCUIT SHARED BY A PLURALITY OF BANKS
- Publication number 20170352402
- Publication date Dec 7, 2017
- Micron Technology, Inc.
- Noriaki Mochida
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE INCLUDING SUBWORD DRIVER CIRCUIT
- Publication number 20170103798
- Publication date Apr 13, 2017
- Micron Technology, Inc.
- NORIAKI MOCHIDA
- G11 - INFORMATION STORAGE
Information Patent Application
TIMING CONTROL CIRCUIT SHARED BY A PLURALITY OF BANKS
- Publication number 20170076778
- Publication date Mar 16, 2017
- Micron Technology, Inc.
- Noriaki Mochida
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor Device Having Hierarchically Structured Bit Lines
- Publication number 20160125961
- Publication date May 5, 2016
- Noriaki MOCHIDA
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE INCLUDING SUBWORD DRIVER CIRCUIT
- Publication number 20150255146
- Publication date Sep 10, 2015
- Micron Technology, Inc.
- NORIAKI MOCHIDA
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE WITH FLOATING BODY STRUCTURE
- Publication number 20150213876
- Publication date Jul 30, 2015
- PS4 LUXCO S.A.R.L.
- Noriaki Mochida
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE AND DATA PROCESSING SYSTEM
- Publication number 20140169058
- Publication date Jun 19, 2014
- Noriaki MOCHIDA
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE HAVING HIERARCHICALLY STRUCTURED BIT LINES
- Publication number 20140050004
- Publication date Feb 20, 2014
- Elpida Memory, Inc.
- Noriaki Mochida
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE HAVING SENSE AMPLIFIER CIRCUIT
- Publication number 20130308403
- Publication date Nov 21, 2013
- Elpida Memory, Inc.
- Izumi NAKAI
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE HAVING HIERARCHICAL BIT LINE STRUCTURE
- Publication number 20130301330
- Publication date Nov 14, 2013
- Elpida Memory, Inc.
- Yasuhiro MATSUMOTO
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE HAVING BIT LINE HIERARCHICALLY STRUCTURED
- Publication number 20130294137
- Publication date Nov 7, 2013
- Elpida Memory, Inc.
- Noriaki MOCHIDA
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE AND DATA PROCESSING SYSTEM
- Publication number 20120230141
- Publication date Sep 13, 2012
- Elpida Memory, Inc.
- Noriaki Mochida
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20120120747
- Publication date May 17, 2012
- Elpida Memory, Inc.
- Noriaki Mochida
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20100296355
- Publication date Nov 25, 2010
- Elpida Memory, Inc.
- Noriaki MOCHIDA
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory device that can relief defective address
- Publication number 20100149894
- Publication date Jun 17, 2010
- Elpida Memory, Inc.
- Noriaki Mochida
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE AND METHOD OF DRIVING THE SAME
- Publication number 20080151674
- Publication date Jun 26, 2008
- Elpida Memory, Inc.
- Munetoshi OHATA
- G11 - INFORMATION STORAGE
Information Patent Application
Wafer-level burn-in test method, wafer-level burn-in test apparatus...
- Publication number 20070076495
- Publication date Apr 5, 2007
- ELPIDA MEMORY, INC.
- Noriaki Mochida
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory device with column selecting switches in hiera...
- Publication number 20060098515
- Publication date May 11, 2006
- Elpida Memory, Inc.
- Noriaki Mochida
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory device
- Publication number 20050052909
- Publication date Mar 10, 2005
- Elpida Memory, Inc.
- Noriaki Mochida
- G11 - INFORMATION STORAGE

Noriaki Mochida

Person

Patents Grantslast 30 patents

Timing adjustment for data input/output buffer circuits

Low power clock injection during idle mode operations

Timing control circuit shared by a plurality of banks

Semiconductor device including subword driver circuit

Timing control circuit shared by a plurality of banks

Timing control circuit shared by a plurality of banks

Semiconductor device having hierarchically structured bit lines

Semiconductor device including subword driver circuit

Semiconductor device having hierarchically structured bit lines

Semiconductor device and data processing system

Semiconductor device having hierarchical bit line structure

Semiconductor device and data processing system

Semiconductor device

Semiconductor device

Semiconductor memory device that can relief defective address

Semiconductor memory device

Semiconductor memory device with column selecting switches in hiera...

Patents Applicationslast 30 patents

TIMING ADJUSTMENT FOR DATA INPUT/OUTPUT BUFFER CIRCUITS

LOW POWER CLOCK INJECTION DURING IDLE MODE OPERATIONS

TIMING CONTROL CIRCUIT SHARED BY A PLURALITY OF BANKS

TIMING CONTROL CIRCUIT SHARED BY A PLURALITY OF BANKS

SEMICONDUCTOR DEVICE INCLUDING SUBWORD DRIVER CIRCUIT

TIMING CONTROL CIRCUIT SHARED BY A PLURALITY OF BANKS

Semiconductor Device Having Hierarchically Structured Bit Lines

SEMICONDUCTOR DEVICE INCLUDING SUBWORD DRIVER CIRCUIT

SEMICONDUCTOR DEVICE WITH FLOATING BODY STRUCTURE

SEMICONDUCTOR DEVICE AND DATA PROCESSING SYSTEM

SEMICONDUCTOR DEVICE HAVING HIERARCHICALLY STRUCTURED BIT LINES

SEMICONDUCTOR DEVICE HAVING SENSE AMPLIFIER CIRCUIT

SEMICONDUCTOR DEVICE HAVING HIERARCHICAL BIT LINE STRUCTURE

SEMICONDUCTOR DEVICE HAVING BIT LINE HIERARCHICALLY STRUCTURED

SEMICONDUCTOR DEVICE AND DATA PROCESSING SYSTEM

SEMICONDUCTOR DEVICE

SEMICONDUCTOR DEVICE

Semiconductor memory device that can relief defective address

SEMICONDUCTOR MEMORY DEVICE AND METHOD OF DRIVING THE SAME

Wafer-level burn-in test method, wafer-level burn-in test apparatus...

Semiconductor memory device with column selecting switches in hiera...

Semiconductor memory device