Olivier LEPAPE

Person

Paris, FR

People

Patents Grantslast 30 patents

Information Patent Grant
Programmable interconnection device
- Patent number 9,362,918
- Issue date Jun 7, 2016
- NANOXPLORE
- Olivier Lepape
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Crossbar structure with mechanism for generating constant outputs
- Patent number 8,245,177
- Issue date Aug 14, 2012
- Meta Systems
- Olivier V. Lepape
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Memory with five-transistor bit cells and associated control circuit
- Patent number 8,072,796
- Issue date Dec 6, 2011
- Meta Systems
- Jean Barbier
- G11 - INFORMATION STORAGE
Information Patent Grant
Reconfigurable circuit with redundant reconfigurable cluster(s)
- Patent number 8,010,826
- Issue date Aug 30, 2011
- Meta Systems
- Frédéric Réblewski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Crossbar device constructed with MEMS switches
- Patent number 8,003,906
- Issue date Aug 23, 2011
- Meta Systems
- Carl Ebeling
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reconfigurable integrated circuits with scalable architecture inclu...
- Patent number 7,768,301
- Issue date Aug 3, 2010
- Abound Logic, S.A.S.
- Olivier V. Lepape
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reconfigurable system and method with corruption detection and reco...
- Patent number 7,568,136
- Issue date Jul 28, 2009
- M2000 SA.
- Frédéric Réblewski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reconfigurable integrated circuits with scalable architecture inclu...
- Patent number 7,498,840
- Issue date Mar 3, 2009
- M2000 SA.
- Olivier V. Lepape
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reconfigurable integrated circuits with scalable architecture inclu...
- Patent number 7,274,215
- Issue date Sep 25, 2007
- M2000 SA.
- Olivier V. Lepape
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configurable circuit with configuration data protection features
- Patent number 7,260,218
- Issue date Aug 21, 2007
- M2000
- Frédéric Réblewski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Regionally time multiplexed emulation system
- Patent number 7,098,688
- Issue date Aug 29, 2006
- Mentor Graphics Corporation
- Frederic Reblewski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Crossbar device with reduced parasitic capacitive loading and usage...
- Patent number 6,874,136
- Issue date Mar 29, 2005
- M2000
- Frederic Reblewski
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Reconfigurable integrated circuit with integrated debugging facilit...
- Patent number 6,717,433
- Issue date Apr 6, 2004
- Jean Barbier
- G01 - MEASURING TESTING
Information Patent Grant
Emulation system scaling
- Patent number 6,647,362
- Issue date Nov 11, 2003
- Frederic Reblewski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reconfigurable integrated circuit with a scalable architecture
- Patent number 6,594,810
- Issue date Jul 15, 2003
- M2000
- Frederic Reblewski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reconfigurable integrated circuit with integrated debussing facilit...
- Patent number 6,388,465
- Issue date May 14, 2002
- Jean Barbier
- G01 - MEASURING TESTING
Information Patent Grant
Reconfigurable integrated circuit with integrated debugging facilit...
- Patent number 6,265,894
- Issue date Jul 24, 2001
- Frederic Reblewski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Field programmable gate array with integrated debugging facilities
- Patent number 6,057,706
- Issue date May 2, 2000
- Mentor Graphics Corporation
- Jean Barbier
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus tracing any node of an emulation
- Patent number 5,999,725
- Issue date Dec 7, 1999
- Mentor Graphics Corporation
- Jean Barbier
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Emulation system having a scalable multi-level multi-stage hybrid p...
- Patent number 5,907,697
- Issue date May 25, 1999
- Mentor Graphics Corporation
- Jean Barbier
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for removing timing hazards in a circuit design
- Patent number 5,831,866
- Issue date Nov 3, 1998
- Mentor Graphics Corporation
- Luc Burgun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for removing timing hazards in a circuit design
- Patent number 5,801,955
- Issue date Sep 1, 1998
- Mentor Graphics Corporation
- Luc Burgun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for tracing any node of an emulation
- Patent number 5,790,832
- Issue date Aug 4, 1998
- Mentor Graphics Corporation
- Jean Barbier
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Field programmable gate array with integrated debugging facilities
- Patent number 5,777,489
- Issue date Jul 7, 1998
- Mentor Graphics Corporation
- Jean Barbier
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for performing fully visible tracing of an emu...
- Patent number 5,754,827
- Issue date May 19, 1998
- Mentor Graphics Corporation
- Jean Barbier
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Emulation system having a scalable multi-level multi-stage programm...
- Patent number 5,574,388
- Issue date Nov 12, 1996
- Mentor Graphics Corporation
- Jean Barbier
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
PROGRAMMABLE INTERCONNECTION DEVICE
- Publication number 20160049942
- Publication date Feb 18, 2016
- NANOXPLORE
- Olivier LEPAPE
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
CROSSBAR STRUCTURE WITH MECHANISM FOR GENERATING CONSTANT OUTPUTS
- Publication number 20120292667
- Publication date Nov 22, 2012
- Olivier V. Lepape
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
CROSSBAR DEVICE CONSTRUCTED WITH MEMS SWITCHES
- Publication number 20100108479
- Publication date May 6, 2010
- M2000
- Carl Ebeling
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CROSSBAR STRUCTURE WITH MECHANISM FOR GENERATING CONSTANT OUTPUTS
- Publication number 20100115483
- Publication date May 6, 2010
- M2000 SA.
- Olivier V. Lepape
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
RECONFIGURABLE CIRCUIT WITH REDUNDANT RECONFIGURABLE CLUSTER(S)
- Publication number 20100095147
- Publication date Apr 15, 2010
- Abound Logic, S.A.S.
- Frédéric Réblewski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SIMULTANEOUS BI-DIRECTIONAL DATA TRANSFER
- Publication number 20100040122
- Publication date Feb 18, 2010
- M2000 SA.
- Jean Barbier
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RECONFIGURABLE INTEGRATED CIRCUITS WITH SCALABLE ARCHITECTURE INCLU...
- Publication number 20090009216
- Publication date Jan 8, 2009
- M2000 SA.
- Olivier V. Lepape
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RECONFIGURABLE INTEGRATED CIRCUITS WITH SCALABLE ARCHITECTURE INCLU...
- Publication number 20070279089
- Publication date Dec 6, 2007
- M2000 SA.
- Olivier V. LePape
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RECONFIGURABLE INTEGRATED CIRCUITS WITH SCALABLE ARCHITECTURE INCLU...
- Publication number 20070164783
- Publication date Jul 19, 2007
- M2000
- Olivier V. Lepape
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Reconfigurable system with corruption detection and recovery
- Publication number 20070168718
- Publication date Jul 19, 2007
- M2000
- Frederic Reblewski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Configurable circuit with configuration data protection features
- Publication number 20070103193
- Publication date May 10, 2007
- M2000
- Frederic Reblewski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Reconfigurable integrated circuit with integrated debugging facilit...
- Publication number 20040178820
- Publication date Sep 16, 2004
- Jean Barbier
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Regionally time multiplexed emulation system
- Publication number 20040075469
- Publication date Apr 22, 2004
- Mentor Graphics Corp.
- Frederic Reblewski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Crossbar device with reduced parasitic capacitive loading and usage...
- Publication number 20030131331
- Publication date Jul 10, 2003
- Frederic Reblewski
- H03 - BASIC ELECTRONIC CIRCUITRY

Olivier LEPAPE

Person

Patents Grantslast 30 patents

Programmable interconnection device

Crossbar structure with mechanism for generating constant outputs

Memory with five-transistor bit cells and associated control circuit

Reconfigurable circuit with redundant reconfigurable cluster(s)

Crossbar device constructed with MEMS switches

Reconfigurable integrated circuits with scalable architecture inclu...

Reconfigurable system and method with corruption detection and reco...

Reconfigurable integrated circuits with scalable architecture inclu...

Reconfigurable integrated circuits with scalable architecture inclu...

Configurable circuit with configuration data protection features

Regionally time multiplexed emulation system

Crossbar device with reduced parasitic capacitive loading and usage...

Reconfigurable integrated circuit with integrated debugging facilit...

Emulation system scaling

Reconfigurable integrated circuit with a scalable architecture

Reconfigurable integrated circuit with integrated debussing facilit...

Reconfigurable integrated circuit with integrated debugging facilit...

Field programmable gate array with integrated debugging facilities

Method and apparatus tracing any node of an emulation

Emulation system having a scalable multi-level multi-stage hybrid p...

Method and apparatus for removing timing hazards in a circuit design

Method and apparatus for removing timing hazards in a circuit design

Method and apparatus for tracing any node of an emulation

Field programmable gate array with integrated debugging facilities

Method and apparatus for performing fully visible tracing of an emu...

Emulation system having a scalable multi-level multi-stage programm...

Patents Applicationslast 30 patents

PROGRAMMABLE INTERCONNECTION DEVICE

CROSSBAR STRUCTURE WITH MECHANISM FOR GENERATING CONSTANT OUTPUTS

CROSSBAR DEVICE CONSTRUCTED WITH MEMS SWITCHES

CROSSBAR STRUCTURE WITH MECHANISM FOR GENERATING CONSTANT OUTPUTS

RECONFIGURABLE CIRCUIT WITH REDUNDANT RECONFIGURABLE CLUSTER(S)

SIMULTANEOUS BI-DIRECTIONAL DATA TRANSFER

RECONFIGURABLE INTEGRATED CIRCUITS WITH SCALABLE ARCHITECTURE INCLU...

RECONFIGURABLE INTEGRATED CIRCUITS WITH SCALABLE ARCHITECTURE INCLU...

RECONFIGURABLE INTEGRATED CIRCUITS WITH SCALABLE ARCHITECTURE INCLU...

Reconfigurable system with corruption detection and recovery

Configurable circuit with configuration data protection features

Reconfigurable integrated circuit with integrated debugging facilit...

Regionally time multiplexed emulation system

Crossbar device with reduced parasitic capacitive loading and usage...