Olivier Rayssac

Person

Grenoble, FR

People

Patents Grantslast 30 patents

Information Patent Grant
Fabrication of substrates with a useful layer of monocrystalline se...
- Patent number 10,002,763
- Issue date Jun 19, 2018
- Soitec
- Fabrice Letertre
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Substrate cutting device and method
- Patent number 8,991,673
- Issue date Mar 31, 2015
- Soitec
- Olivier Rayssac
- B28 - WORKING CEMENT, CLAY, OR STONE
Information Patent Grant
Fabrication of substrates with a useful layer of monocrystalline se...
- Patent number 8,507,361
- Issue date Aug 13, 2013
- Soitec
- Fabrice Letertre
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fabrication of substrates with a useful layer of monocrystalline se...
- Patent number 8,252,664
- Issue date Aug 28, 2012
- Soitec
- Fabrice Letertre
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for forming an assembly for transfer of a useful layer usin...
- Patent number 8,093,687
- Issue date Jan 10, 2012
- S.O.I. Tec Silicon on Insulator Technologies
- Fabrice Letertre
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Substrate cutting device and method
- Patent number 8,083,115
- Issue date Dec 27, 2011
- S.O.I. Tec Silicon on Insulator Technologies
- Olivier Rayssac
- B28 - WORKING CEMENT, CLAY, OR STONE
Information Patent Grant
Method of fabricating a release substrate
- Patent number 8,012,289
- Issue date Sep 6, 2011
- S.O.I. Tec Silicon on Insulator Technologies
- Olivier Rayssac
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transfer method with a treatment of a surface to be bonded
- Patent number 7,972,939
- Issue date Jul 5, 2011
- S.O.I. Tec Silicon on Insulator Technologies
- Sébastien Kerdiles
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for making substrates and substrates formed therefrom
- Patent number 7,939,428
- Issue date May 10, 2011
- S.O.I. Tec Silicon on Insulator Technologies
- Alice Boussagol
- C30 - CRYSTAL GROWTH
Information Patent Grant
Detachable substrate with controlled mechanical strength and method...
- Patent number 7,902,038
- Issue date Mar 8, 2011
- Commissariat a l'Energie Atomique
- Bernard Aspar
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Device and method for cutting an assembly
- Patent number 7,892,946
- Issue date Feb 22, 2011
- S.O.I. Tec Silicon on Insulator Technologies
- Olivier Rayssac
- B28 - WORKING CEMENT, CLAY, OR STONE
Information Patent Grant
Fabrication of substrates with a useful layer of monocrystalline se...
- Patent number 7,888,235
- Issue date Feb 15, 2011
- S.O.I. Tec Silicon on Insulator Technologies
- Fabrice Letertre
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Methods for making substrates and substrates formed therefrom
- Patent number 7,839,001
- Issue date Nov 23, 2010
- S.O.I. Tec Silicon on Insulator Technologies
- Alice Boussagol
- C30 - CRYSTAL GROWTH
Information Patent Grant
Detachable substrate or detachable structure and method for the pro...
- Patent number 7,713,369
- Issue date May 11, 2010
- Commissariat a l'Energie Atomique
- Bernard Aspar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for direct bonding two semiconductor substrates
- Patent number 7,670,929
- Issue date Mar 2, 2010
- S.O.I. Tec Silicon on Insulator Technologies
- Konstantin Bourdelle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for making substrates and substrates formed therefrom
- Patent number 7,615,468
- Issue date Nov 10, 2009
- S.O.I. Tec Silicon on Insulator Technologies
- Alice Boussagol
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transfer method with a treatment of a surface to be bonded
- Patent number 7,615,464
- Issue date Nov 10, 2009
- S.O.I. Tec Silicon on Insulator Technologies
- Sébastien Kerdiles
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating a hybrid substrate
- Patent number 7,575,988
- Issue date Aug 18, 2009
- S.O.I. Tec Silicon on Insulator Technologies
- Konstantin Bourdelle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating a release substrate
- Patent number 7,544,265
- Issue date Jun 9, 2009
- S.O.I. Tec Silicon on Insulator Technologies
- Takeshi Akatsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating chips and an associated support
- Patent number 7,544,586
- Issue date Jun 9, 2009
- S.O.I. Tec Silicon on Insulator Technologies
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Embrittled substrate and method for making same
- Patent number 7,498,245
- Issue date Mar 3, 2009
- Commissariat a l'Energie Atomique
- Bernard Aspar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Atomic implantation and thermal treatment of a semiconductor layer
- Patent number 7,449,394
- Issue date Nov 11, 2008
- S.O.I. Tec Silicon on Insulator Technologies
- Takeshi Akatsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for producing a semiconductor entity
- Patent number 7,439,160
- Issue date Oct 21, 2008
- S.O.I. Tec Silicon on Insulator Technologies
- Yves Matthieu Le Vaillant
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Substrate layer cutting device and method
- Patent number 7,406,994
- Issue date Aug 5, 2008
- S.O.I. Tec Silicon on Insulator Technologies
- Muriel Martinez
- B28 - WORKING CEMENT, CLAY, OR STONE
Information Patent Grant
Substrate for stressed systems and method of making same
- Patent number 7,405,135
- Issue date Jul 29, 2008
- S.O.I. Tec Silicon on Insulator Technologies
- Fabrice Letertre
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Methods for forming an assembly for transfer of a useful layer
- Patent number 7,404,870
- Issue date Jul 29, 2008
- S.O.I. Tec Silicon on Insulator Technologies
- Fabrice Letertre
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure and method of making same
- Patent number 7,391,094
- Issue date Jun 24, 2008
- S.O.I. Tec Silicon on Insulator Technologies
- Olivier Rayssac
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Substrate assembly for stressed systems
- Patent number 7,279,779
- Issue date Oct 9, 2007
- S.O.I. Tec Silicon on Insulator Technologies
- Fabrice Letertre
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for forming a semiconductor structure
- Patent number 7,276,428
- Issue date Oct 2, 2007
- S.O.I. Tec Silicon on Insulator Technologies
- Nicolas Daval
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fabrication of substrates with a useful layer of monocrystalline se...
- Patent number 7,265,029
- Issue date Sep 4, 2007
- S.O.I. Tec Silicon on Insulator Technologies
- Fabrice Letertre
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
FABRICATION OF SUBSTRATES WITH A USEFUL LAYER OF MONOCRYSTALLINE SE...
- Publication number 20120058621
- Publication date Mar 8, 2012
- Fabrice Letertre
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SUBSTRATE CUTTING DEVICE AND METHOD
- Publication number 20120048906
- Publication date Mar 1, 2012
- Olivier Rayssac
- B28 - WORKING CEMENT, CLAY, OR STONE
Information Patent Application
FABRICATION OF SUBSTRATES WITH A USEFUL LAYER OF MONOCRYSTALLINE SE...
- Publication number 20120012048
- Publication date Jan 19, 2012
- S.O.I.Tec Silicon on Insulator Technologies
- Fabrice Letertre
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FABRICATING A RELEASE SUBSTRATE
- Publication number 20110233733
- Publication date Sep 29, 2011
- S.O.I.Tec Silicon on Insulator Technologies
- Olivier Rayssac
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FABRICATION OF SUBSTRATES WITH A USEFUL LAYER OF MONOCRYSTALLINE SE...
- Publication number 20110171812
- Publication date Jul 14, 2011
- Fabrice Letertre
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR MAKING SUBSTRATES AND SUBSTRATES FORMED THEREFROM
- Publication number 20110039368
- Publication date Feb 17, 2011
- Alice Boussagol
- C30 - CRYSTAL GROWTH
Information Patent Application
TRANSFER METHOD WITH A TREATMENT OF A SURFACE TO BE BONDED
- Publication number 20100015780
- Publication date Jan 21, 2010
- S.O.I.Tec Silicon on Insulator Technologies
- Sébastien KERDILES
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR MAKING SUBSTRATES AND SUBSTRATES FORMED THEREFROM
- Publication number 20090289332
- Publication date Nov 26, 2009
- S.O.I.Tec Silicon on Insulator Technologies
- Alice Boussagol
- C30 - CRYSTAL GROWTH
Information Patent Application
METHOD OF FABRICATING A RELEASE SUBSTRATE
- Publication number 20090179299
- Publication date Jul 16, 2009
- Olivier RAYSSAC
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR FORMING AN ASSEMBLY FOR TRANSFER OF A USEFUL LAYER
- Publication number 20080258265
- Publication date Oct 23, 2008
- S.O.I.Tec Silicon on Insulator Technologies
- Fabrice Letertre
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FABRICATING A HYBRID SUBSTRATE
- Publication number 20080014714
- Publication date Jan 17, 2008
- Konstantin Bourdelle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR DIRECT BONDING TWO SEMICONDUCTOR SUBSTRATES
- Publication number 20080014712
- Publication date Jan 17, 2008
- Konstantin Bourdelle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR MAKING SUBSTRATES AND SUBSTRATES FORMED THEREFROM
- Publication number 20070287273
- Publication date Dec 13, 2007
- Alice Boussagol
- C30 - CRYSTAL GROWTH
Information Patent Application
FABRICATION OF SUBSTRATES WITH A USEFUL LAYER OF MONOCRYSTALLINE SE...
- Publication number 20070269960
- Publication date Nov 22, 2007
- S. O. I. Tec Silicon on Insulator Technologies
- Fabrice Letertre
- C30 - CRYSTAL GROWTH
Information Patent Application
DEVICE AND METHOD FOR CUTTING AN ASSEMBLY
- Publication number 20070148915
- Publication date Jun 28, 2007
- S.O.I. TEC SILICON ON INSULATOR TECHNOLOGIES S.A.,
- Olivier Rayssac
- B28 - WORKING CEMENT, CLAY, OR STONE
Information Patent Application
SUBSTRATE LAYER CUTTING DEVICE AND METHOD
- Publication number 20070122926
- Publication date May 31, 2007
- S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES S.A.
- Muriel Martinez
- B28 - WORKING CEMENT, CLAY, OR STONE
Information Patent Application
SUBSTRATE CUTTING DEVICE AND METHOD
- Publication number 20070119893
- Publication date May 31, 2007
- S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES S.A.
- Olivier Rayssac
- B28 - WORKING CEMENT, CLAY, OR STONE
Information Patent Application
METHODS FOR PRODUCING A SEMICONDUCTOR ENTITY
- Publication number 20070104240
- Publication date May 10, 2007
- S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES S.A.
- Yves Matthieu Le Vaillant
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of fabricating a release substrate
- Publication number 20070077729
- Publication date Apr 5, 2007
- Olivier Rayssac
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Transfer method with a treatment of a surface to be bonded
- Publication number 20060270187
- Publication date Nov 30, 2006
- Sébastien Kerdiles
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods for forming an assembly for transfer of a useful layer
- Publication number 20060231203
- Publication date Oct 19, 2006
- S.O.I.Tec Silicon on Insulator Technologies S.A., a French company
- Fabrice Letertre
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Substrate for stressed systems and method of making same
- Publication number 20060216849
- Publication date Sep 28, 2006
- S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES S.A.
- Fabrice Letertre
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
Substrate assembly for stressed systems
- Publication number 20060192269
- Publication date Aug 31, 2006
- S.O.I.Tec Silicon on Insulator Technologies S.A., a French company
- Fabrice Letertre
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor structure and method of making same
- Publication number 20060086949
- Publication date Apr 27, 2006
- S.O.I.Tec Silicon on Insulator Technologies S.A., a French company
- Olivier Rayssac
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Substrate for stressed systems and method of making same
- Publication number 20060079070
- Publication date Apr 13, 2006
- S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES S.A.
- Fabrice Letertre
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
Substrate for stressed systems and method of making same
- Publication number 20060076649
- Publication date Apr 13, 2006
- S.O.I. TEC SILICON ON INSULATOR TECHNOLOGIES S.A.
- Fabrice Letertre
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
Thermal treatment of a semiconductor layer
- Publication number 20060014363
- Publication date Jan 19, 2006
- Nicolas Daval
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Atomic implantation and thermal treatment of a semiconductor layer
- Publication number 20050245049
- Publication date Nov 3, 2005
- Takeshi Akatsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of fabricating chips, and an associated support
- Publication number 20050236700
- Publication date Oct 27, 2005
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods for forming a semiconductor structure
- Publication number 20050196937
- Publication date Sep 8, 2005
- Nicolas Daval
- H01 - BASIC ELECTRIC ELEMENTS

Olivier Rayssac

Person

Patents Grantslast 30 patents

Fabrication of substrates with a useful layer of monocrystalline se...

Substrate cutting device and method

Fabrication of substrates with a useful layer of monocrystalline se...

Fabrication of substrates with a useful layer of monocrystalline se...

Methods for forming an assembly for transfer of a useful layer usin...

Substrate cutting device and method

Method of fabricating a release substrate

Transfer method with a treatment of a surface to be bonded

Methods for making substrates and substrates formed therefrom

Detachable substrate with controlled mechanical strength and method...

Device and method for cutting an assembly

Fabrication of substrates with a useful layer of monocrystalline se...

Methods for making substrates and substrates formed therefrom

Detachable substrate or detachable structure and method for the pro...

Method for direct bonding two semiconductor substrates

Methods for making substrates and substrates formed therefrom

Transfer method with a treatment of a surface to be bonded

Method of fabricating a hybrid substrate

Method of fabricating a release substrate

Method of fabricating chips and an associated support

Embrittled substrate and method for making same

Atomic implantation and thermal treatment of a semiconductor layer

Methods for producing a semiconductor entity

Substrate layer cutting device and method

Substrate for stressed systems and method of making same

Methods for forming an assembly for transfer of a useful layer

Semiconductor structure and method of making same

Substrate assembly for stressed systems

Methods for forming a semiconductor structure

Fabrication of substrates with a useful layer of monocrystalline se...

Patents Applicationslast 30 patents

FABRICATION OF SUBSTRATES WITH A USEFUL LAYER OF MONOCRYSTALLINE SE...

SUBSTRATE CUTTING DEVICE AND METHOD

FABRICATION OF SUBSTRATES WITH A USEFUL LAYER OF MONOCRYSTALLINE SE...

METHOD OF FABRICATING A RELEASE SUBSTRATE

FABRICATION OF SUBSTRATES WITH A USEFUL LAYER OF MONOCRYSTALLINE SE...

METHODS FOR MAKING SUBSTRATES AND SUBSTRATES FORMED THEREFROM

TRANSFER METHOD WITH A TREATMENT OF A SURFACE TO BE BONDED

METHODS FOR MAKING SUBSTRATES AND SUBSTRATES FORMED THEREFROM

METHOD OF FABRICATING A RELEASE SUBSTRATE

METHODS FOR FORMING AN ASSEMBLY FOR TRANSFER OF A USEFUL LAYER

METHOD OF FABRICATING A HYBRID SUBSTRATE

METHOD FOR DIRECT BONDING TWO SEMICONDUCTOR SUBSTRATES

METHODS FOR MAKING SUBSTRATES AND SUBSTRATES FORMED THEREFROM

FABRICATION OF SUBSTRATES WITH A USEFUL LAYER OF MONOCRYSTALLINE SE...

DEVICE AND METHOD FOR CUTTING AN ASSEMBLY

SUBSTRATE LAYER CUTTING DEVICE AND METHOD

SUBSTRATE CUTTING DEVICE AND METHOD

METHODS FOR PRODUCING A SEMICONDUCTOR ENTITY

Method of fabricating a release substrate

Transfer method with a treatment of a surface to be bonded

Methods for forming an assembly for transfer of a useful layer

Substrate for stressed systems and method of making same

Substrate assembly for stressed systems

Semiconductor structure and method of making same

Substrate for stressed systems and method of making same

Substrate for stressed systems and method of making same

Thermal treatment of a semiconductor layer

Atomic implantation and thermal treatment of a semiconductor layer

Method of fabricating chips, and an associated support

Methods for forming a semiconductor structure