Olivier Thomas

Person

Revel, FR

People

Patents Grantslast 30 patents

Information Patent Grant
Device and method for writing data to a resistive memory
- Patent number 10,559,355
- Issue date Feb 11, 2020
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Michel Harrand
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile resistive memory cell comprising metal electrodes and...
- Patent number 10,002,664
- Issue date Jun 19, 2018
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Elisa Vianello
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory cell with read transistors of the TFET and MOSFET type to re...
- Patent number 9,685,222
- Issue date Jun 20, 2017
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Olivier Thomas
- G11 - INFORMATION STORAGE
Information Patent Grant
Reconfigurable cam
- Patent number 9,679,649
- Issue date Jun 13, 2017
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Navneet Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Device with SRAM memory cells including means for polarizing wells...
- Patent number 9,542,996
- Issue date Jan 10, 2017
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Olivier Thomas
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable-resistance non-volatile memory
- Patent number 9,508,434
- Issue date Nov 29, 2016
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Thomas-Medhi Benoist
- G11 - INFORMATION STORAGE
Information Patent Grant
Device and method for writing data to a resistive memory
- Patent number 9,449,688
- Issue date Sep 20, 2016
- Commissariat a l'Energie Atomique et aux Energies Alternatives
- Olivier Thomas
- G11 - INFORMATION STORAGE
Information Patent Grant
SOI integrated circuit comprising adjacent cells of different types
- Patent number 9,190,334
- Issue date Nov 17, 2015
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Olivier Thomas
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Circuit for reverse biasing inverters for reducing the power consum...
- Patent number 9,099,993
- Issue date Aug 4, 2015
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Olivier Thomas
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit using FDSOI technology, with well sharing and me...
- Patent number 9,093,499
- Issue date Jul 28, 2015
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Jean-Philippe Noel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-contained integrated circuit including adjacent cells of diffe...
- Patent number 8,969,967
- Issue date Mar 3, 2015
- Commissariat a l'Energie et aux Energies Alternatives
- Jean-Philippe Noel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit made out of SOI with transistors having distinct...
- Patent number 8,723,267
- Issue date May 13, 2014
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Olivier Thomas
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-level integrated circuit, device and method for modeling mult...
- Patent number 8,710,671
- Issue date Apr 29, 2014
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Shashikanth Bobba
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Substrate provided with a semi-conducting area associated with two...
- Patent number 8,674,443
- Issue date Mar 18, 2014
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Philippe Coronel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
SRAM memory cell provided with transistors having a vertical multic...
- Patent number 8,502,318
- Issue date Aug 6, 2013
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Olivier Thomas
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for making asymmetric double-gate transistors
- Patent number 8,399,316
- Issue date Mar 19, 2013
- Commissariat a l'Energie Atomique
- Maud Vinet
- G11 - INFORMATION STORAGE
Information Patent Grant
Compact field effect transistor with counter-electrode and fabricat...
- Patent number 8,368,128
- Issue date Feb 5, 2013
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Claire Fenouillet-Béranger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating asymmetric double-gate transistors by which...
- Patent number 8,324,057
- Issue date Dec 4, 2012
- Commissariat a l'Energie Atomique
- Maud Vinet
- G11 - INFORMATION STORAGE
Information Patent Grant
SRAM memory cell with double gate transistors provided means to imp...
- Patent number 8,320,198
- Issue date Nov 27, 2012
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Olivier Thomas
- G11 - INFORMATION STORAGE
Information Patent Grant
SRAM memory cell with four transistors provided with a counter-elec...
- Patent number 8,314,453
- Issue date Nov 20, 2012
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Olivier Thomas
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for making asymmetric double-gate transistors by which asymm...
- Patent number 8,232,168
- Issue date Jul 31, 2012
- Commissariat a l'Energie Atomique
- Maud Vinet
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit with transistors integrated in three dimensions and having...
- Patent number 8,183,630
- Issue date May 22, 2012
- Commissariat a l'Energie Atomique
- Perrine Batude
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory cell provided with dual-gate transistors, with independent a...
- Patent number 8,116,118
- Issue date Feb 14, 2012
- Commissariat a l'Energie Atomique
- Olivier Thomas
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for fabricating asymmetric double-gate transistors by which...
- Patent number 8,105,906
- Issue date Jan 31, 2012
- Commissariat a l'Energie Atomique
- Maud Vinet
- G11 - INFORMATION STORAGE
Information Patent Grant
SRAM memory cell having transistors integrated at several levels an...
- Patent number 8,013,399
- Issue date Sep 6, 2011
- Commissariat a l'Energie Atomique
- Olivier Thomas
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit with a power transistor gate bias controlled by...
- Patent number 7,928,797
- Issue date Apr 19, 2011
- Commissariat a l'Energie Atomique
- Alexandre Valentian
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Suspended-gate MOS transistor with non-volatile operation
- Patent number 7,812,410
- Issue date Oct 12, 2010
- Commissariat a l'Energie Atomique
- Michael Collonge
- B82 - NANO-TECHNOLOGY
Information Patent Grant
SRAM memory with reference bias cell
- Patent number 7,787,286
- Issue date Aug 31, 2010
- Commissariat a l'Energie Atomique
- Olivier Thomas
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile SRAM memory cell equipped with mobile gate transistors...
- Patent number 7,768,821
- Issue date Aug 3, 2010
- Commissariat a l'Energie Atomique
- Olivier Thomas
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and device for adapting the voltage of a MOS transistor bulk
- Patent number 7,622,983
- Issue date Nov 24, 2009
- STMicroelectronics S.A.
- Olivier Thomas
- G05 - CONTROLLING REGULATING

Patents Applicationslast 30 patents

Information Patent Application
RECONFIGURABLE CAM
- Publication number 20170133092
- Publication date May 11, 2017
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Navneet Gupta
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CELL WITH READ TRANSISTORS OF THE TFET AND MOSFET TYPE TO RE...
- Publication number 20170110179
- Publication date Apr 20, 2017
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Olivier THOMAS
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE WITH MEMORY CELLS SRAM (STATIC RANDOM ACCESS MEMORIES...
- Publication number 20160078924
- Publication date Mar 17, 2016
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Olivier THOMAS
- G11 - INFORMATION STORAGE
Information Patent Application
DEVICE AND METHOD FOR WRITING DATA TO A RESISTIVE MEMORY
- Publication number 20160071589
- Publication date Mar 10, 2016
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Olivier Thomas
- G11 - INFORMATION STORAGE
Information Patent Application
DEVICE AND METHOD FOR WRITING DATA TO A RESISTIVE MEMORY
- Publication number 20160071588
- Publication date Mar 10, 2016
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Michel Harrand
- G11 - INFORMATION STORAGE
Information Patent Application
MEMOIRE NON VOLATILE A RESISTANCE PROGRAMMABLE
- Publication number 20160027509
- Publication date Jan 28, 2016
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Thomas-Medhi BENOIST
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE RESISTIVE MEMORY CELL
- Publication number 20150078065
- Publication date Mar 19, 2015
- COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE. ALT.
- Elisa Vianello
- G11 - INFORMATION STORAGE
Information Patent Application
CIRCUIT FOR REVERSE BIASING INVERTERS FOR REDUCING THE POWER CONSUM...
- Publication number 20140334226
- Publication date Nov 13, 2014
- Olivier Thomas
- G11 - INFORMATION STORAGE
Information Patent Application
SELF-CONTAINED INTEGRATED CIRCUIT INCLUDING ADJACENT CELLS OF DIFFE...
- Publication number 20140077300
- Publication date Mar 20, 2014
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Jean-Philippe Noel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT USING FDSOI TECHNOLOGY, WITH WELL SHARING AND ME...
- Publication number 20130089978
- Publication date Apr 11, 2013
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Jean-Philippe Noel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SOI INTEGRATED CIRCUIT COMPRISING ADJACENT CELLS OF DIFFERENT TYPES
- Publication number 20130065366
- Publication date Mar 14, 2013
- STMicroelectronics
- Olivier Thomas
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI-LEVEL INTEGRATED CIRCUIT, DEVICE AND METHOD FOR MODELING MULT...
- Publication number 20120161329
- Publication date Jun 28, 2012
- COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE. ALT.
- Shashikanth BOBBA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELF-CONTAINED INTEGRATED CIRCUIT HAVING TRANSISTORS WITH SEPARATE...
- Publication number 20120126333
- Publication date May 24, 2012
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Olivier Thomas
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SUBSTRATE PROVIDED WITH A SEMI-CONDUCTING AREA ASSOCIATED WITH TWO...
- Publication number 20110316055
- Publication date Dec 29, 2011
- STMicroelectronics (Crolles 2) SAS
- Philippe CORONEL
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
COMPACT FIELD EFFECT TRANSISTOR WITH COUNTER-ELECTRODE AND FABRICAT...
- Publication number 20110298019
- Publication date Dec 8, 2011
- STMicroelectronics (Crolles 2) SAS
- Claire FENOUILLET-BÉRANGER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SRAM MEMORY CELL WITH FOUR TRANSISTORS PROVIDED WITH A COUNTER-ELEC...
- Publication number 20110291199
- Publication date Dec 1, 2011
- STMicroelectronics (Crolles 2) SAS
- Olivier THOMAS
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR FABRICATING ASYMMETRIC DOUBLE-GATE TRANSISTORS BY WHICH...
- Publication number 20100320541
- Publication date Dec 23, 2010
- COMMISSARIAT A L'ENERGIE ATOMIQUE
- Maud Vinet
- G11 - INFORMATION STORAGE
Information Patent Application
SRAM MEMORY CELL WITH DOUBLE GATE TRANSISTORS PROVIDED WITH MEANS T...
- Publication number 20100315889
- Publication date Dec 16, 2010
- COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE. ALT.
- Olivier Thomas
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR MAKING ASYMMETRIC DOUBLE-GATE TRANSISTORS BY WHICH ASYMM...
- Publication number 20100317167
- Publication date Dec 16, 2010
- COMMISSARIAT A L'ENERGIE ATOMIQUE
- Maud Vinet
- G11 - INFORMATION STORAGE
Information Patent Application
SRAM MEMORY CELL PROVIDED WITH TRANSISTORS HAVING A VERTICAL MULTIC...
- Publication number 20100264496
- Publication date Oct 21, 2010
- Comm. A L'Energie Atom. et aux Energies Alterna
- Olivier Thomas
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR MAKING ASYMMETRIC DOUBLE-GATE TRANSISTORS
- Publication number 20100178743
- Publication date Jul 15, 2010
- COMMISSARIAT A L'ENERGIE ATOMIQUE
- Maud Vinet
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated Circuit with a Power Transistor Gate Bias Controlled by...
- Publication number 20100117720
- Publication date May 13, 2010
- COMMISSARIAT A L'ENERGIE ATOMIQUE
- Alexandre Valentian
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD FOR FABRICATING ASYMMETRIC DOUBLE-GATE TRANSISTORS BY WHICH...
- Publication number 20100096700
- Publication date Apr 22, 2010
- COMMISSARIAT A L'ENERGIE ATOMIQUE
- Maud Vinet
- G11 - INFORMATION STORAGE
Information Patent Application
SRAM MEMORY CELL HAVING TRANSISTORS INTEGRATED AT SEVERAL LEVELS AN...
- Publication number 20090294861
- Publication date Dec 3, 2009
- COMMISSARIAT A L'ENERGIE ATOMIQUE
- Olivier THOMAS
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CIRCUIT WITH TRANSISTORS INTEGRATED IN THREE DIMENSIONS AND HAVING...
- Publication number 20090294822
- Publication date Dec 3, 2009
- COMMISSARIAT A L'ENERGIE ATOMIQUE
- Perrine Batude
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SRAM MEMORY WITH REFERENCE BIAS CELL
- Publication number 20090080237
- Publication date Mar 26, 2009
- COMMISSARIAT A L'ENERGIE ATOMIQUE
- Olivier Thomas
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE SRAM MEMORY CELL EQUIPPED WITH MOBILE GATE TRANSISTORS...
- Publication number 20090016095
- Publication date Jan 15, 2009
- COMMISSARIAT A L'ENERGIE ATOMIQUE
- Olivier Thomas
- G11 - INFORMATION STORAGE
Information Patent Application
SUSPENDED-GATE MOS TRANSISTOR WITH NON-VOLATILE OPERATION
- Publication number 20090014769
- Publication date Jan 15, 2009
- COMMISSARIAT A L'ENERGIE ATOMIQUE
- Michael Collonge
- G11 - INFORMATION STORAGE
Information Patent Application
Memory cell provided with dual-gate transistors, with independent a...
- Publication number 20080175039
- Publication date Jul 24, 2008
- COMMISSARIAT A L'ENERGIE ATOMIQUE
- Olivier Thomas
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND DEVICE FOR ADAPTING THE VOLTAGE OF A MOS TRANSISTOR BULK
- Publication number 20070262809
- Publication date Nov 15, 2007
- STMicroelectronics S.A.
- Olivier Thomas
- G05 - CONTROLLING REGULATING

Olivier Thomas

Person

Patents Grantslast 30 patents

Device and method for writing data to a resistive memory

Non-volatile resistive memory cell comprising metal electrodes and...

Memory cell with read transistors of the TFET and MOSFET type to re...

Reconfigurable cam

Device with SRAM memory cells including means for polarizing wells...

Programmable-resistance non-volatile memory

Device and method for writing data to a resistive memory

SOI integrated circuit comprising adjacent cells of different types

Circuit for reverse biasing inverters for reducing the power consum...

Integrated circuit using FDSOI technology, with well sharing and me...

Self-contained integrated circuit including adjacent cells of diffe...

Integrated circuit made out of SOI with transistors having distinct...

Multi-level integrated circuit, device and method for modeling mult...

Substrate provided with a semi-conducting area associated with two...

SRAM memory cell provided with transistors having a vertical multic...

Method for making asymmetric double-gate transistors

Compact field effect transistor with counter-electrode and fabricat...

Method for fabricating asymmetric double-gate transistors by which...

SRAM memory cell with double gate transistors provided means to imp...

SRAM memory cell with four transistors provided with a counter-elec...

Method for making asymmetric double-gate transistors by which asymm...

Circuit with transistors integrated in three dimensions and having...

Memory cell provided with dual-gate transistors, with independent a...

Method for fabricating asymmetric double-gate transistors by which...

SRAM memory cell having transistors integrated at several levels an...

Integrated circuit with a power transistor gate bias controlled by...

Suspended-gate MOS transistor with non-volatile operation

SRAM memory with reference bias cell

Non-volatile SRAM memory cell equipped with mobile gate transistors...

Method and device for adapting the voltage of a MOS transistor bulk

Patents Applicationslast 30 patents

RECONFIGURABLE CAM

MEMORY CELL WITH READ TRANSISTORS OF THE TFET AND MOSFET TYPE TO RE...

MEMORY DEVICE WITH MEMORY CELLS SRAM (STATIC RANDOM ACCESS MEMORIES...

DEVICE AND METHOD FOR WRITING DATA TO A RESISTIVE MEMORY

DEVICE AND METHOD FOR WRITING DATA TO A RESISTIVE MEMORY

MEMOIRE NON VOLATILE A RESISTANCE PROGRAMMABLE

NON-VOLATILE RESISTIVE MEMORY CELL

CIRCUIT FOR REVERSE BIASING INVERTERS FOR REDUCING THE POWER CONSUM...

SELF-CONTAINED INTEGRATED CIRCUIT INCLUDING ADJACENT CELLS OF DIFFE...

INTEGRATED CIRCUIT USING FDSOI TECHNOLOGY, WITH WELL SHARING AND ME...

SOI INTEGRATED CIRCUIT COMPRISING ADJACENT CELLS OF DIFFERENT TYPES

MULTI-LEVEL INTEGRATED CIRCUIT, DEVICE AND METHOD FOR MODELING MULT...

SELF-CONTAINED INTEGRATED CIRCUIT HAVING TRANSISTORS WITH SEPARATE...

SUBSTRATE PROVIDED WITH A SEMI-CONDUCTING AREA ASSOCIATED WITH TWO...

COMPACT FIELD EFFECT TRANSISTOR WITH COUNTER-ELECTRODE AND FABRICAT...

SRAM MEMORY CELL WITH FOUR TRANSISTORS PROVIDED WITH A COUNTER-ELEC...

METHOD FOR FABRICATING ASYMMETRIC DOUBLE-GATE TRANSISTORS BY WHICH...

SRAM MEMORY CELL WITH DOUBLE GATE TRANSISTORS PROVIDED WITH MEANS T...

METHOD FOR MAKING ASYMMETRIC DOUBLE-GATE TRANSISTORS BY WHICH ASYMM...

SRAM MEMORY CELL PROVIDED WITH TRANSISTORS HAVING A VERTICAL MULTIC...

METHOD FOR MAKING ASYMMETRIC DOUBLE-GATE TRANSISTORS

Integrated Circuit with a Power Transistor Gate Bias Controlled by...

METHOD FOR FABRICATING ASYMMETRIC DOUBLE-GATE TRANSISTORS BY WHICH...

SRAM MEMORY CELL HAVING TRANSISTORS INTEGRATED AT SEVERAL LEVELS AN...

CIRCUIT WITH TRANSISTORS INTEGRATED IN THREE DIMENSIONS AND HAVING...

SRAM MEMORY WITH REFERENCE BIAS CELL

NON-VOLATILE SRAM MEMORY CELL EQUIPPED WITH MOBILE GATE TRANSISTORS...

SUSPENDED-GATE MOS TRANSISTOR WITH NON-VOLATILE OPERATION

Memory cell provided with dual-gate transistors, with independent a...

METHOD AND DEVICE FOR ADAPTING THE VOLTAGE OF A MOS TRANSISTOR BULK