Oswin E. Housty

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Memory context restore, reduction of boot time of a system on a chi...
- Patent number 11,682,445
- Issue date Jun 20, 2023
- Advanced Micro Devices, Inc.
- Kevin M. Brandl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory context restore, reduction of boot time of a system on a chi...
- Patent number 11,176,986
- Issue date Nov 16, 2021
- Advanced Micro Devices, Inc.
- Kevin M. Brandl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Secure system memory training
- Patent number 10,311,236
- Issue date Jun 4, 2019
- Advanced Micro Devices, Inc.
- Kathirkamanathan Nadarajah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
DDR 2D Vref training
- Patent number 9,214,199
- Issue date Dec 15, 2015
- Advanced Micro Devices, Inc.
- Kevin M. Brandl
- G11 - INFORMATION STORAGE
Information Patent Grant
DDR receiver enable cycle training
- Patent number 9,183,125
- Issue date Nov 10, 2015
- Advanced Micro Devices, Inc.
- Kevin M. Brandl
- G11 - INFORMATION STORAGE
Information Patent Grant
DDR 2D Vref training
- Patent number 8,850,155
- Issue date Sep 30, 2014
- Advanced Micro Devices, Inc.
- Kevin M. Brandl
- G11 - INFORMATION STORAGE
Information Patent Grant
Distributed multi-core memory initialization
- Patent number 8,566,570
- Issue date Oct 22, 2013
- Advanced Micro Devices, Inc.
- Oswin E. Housty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pre-memory resource contention resolution
- Patent number 8,392,640
- Issue date Mar 5, 2013
- Advanced Micro Devices, Inc.
- Oswin E. Housty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Distributed multi-core memory initialization
- Patent number 8,307,198
- Issue date Nov 6, 2012
- Advanced Micro Devices, Inc.
- Oswin E. Housty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiprocessor communication device and methods thereof
- Patent number 8,176,303
- Issue date May 8, 2012
- GlobalFoundries Inc.
- Oswin E. Housty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory control device and methods thereof
- Patent number 8,055,939
- Issue date Nov 8, 2011
- Advanced Micro Devices, Inc.
- David M. Lynch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bootstrap device and methods thereof
- Patent number 7,971,098
- Issue date Jun 28, 2011
- GlobalFoundries Inc.
- Andelon X. Tra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for training dynamic random access memory (DRAM) controller...
- Patent number 7,924,637
- Issue date Apr 12, 2011
- Advanced Micro Devices, Inc.
- Shawn Searles
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory check architecture and method for a multiprocessor computer...
- Patent number 7,251,744
- Issue date Jul 31, 2007
- Advanced Micro Devices Inc.
- Oswin Housty
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
PARALLELIZED BOOT SEQUENCE
- Publication number 20240403065
- Publication date Dec 5, 2024
- ADVANCED MICRO DEVICES, INC.
- Sriram Sambamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY CONTEXT RESTORE, REDUCTION OF BOOT TIME OF A SYSTEM ON A CHI...
- Publication number 20220076739
- Publication date Mar 10, 2022
- ADVANCED MICRO DEVICES, INC.
- Kevin M. Brandl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY CONTEXT RESTORE, REDUCTION OF BOOT TIME OF A SYSTEM ON A CHI...
- Publication number 20210201986
- Publication date Jul 1, 2021
- ADVANCED MICRO DEVICES, INC.
- Kevin M. Brandl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SECURE SYSTEM MEMORY TRAINING
- Publication number 20180144136
- Publication date May 24, 2018
- Advanced Micro Devices, Inc.
- Kathirkamanathan Nadarajah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DDR 2D VREF TRAINING
- Publication number 20150078104
- Publication date Mar 19, 2015
- Advanced Micro Devices, Inc.
- Kevin M. Brandl
- G11 - INFORMATION STORAGE
Information Patent Application
ENHANCED SYSTEM MANAGEMENT BUS
- Publication number 20130346735
- Publication date Dec 26, 2013
- ATI Technologies ULC
- David M. Lynch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DDR RECEIVER ENABLE CYCLE TRAINING
- Publication number 20130159615
- Publication date Jun 20, 2013
- Advanced Micro Devices, Inc.
- Kevin M. Brandl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DDR 2D VREF TRAINING
- Publication number 20130155788
- Publication date Jun 20, 2013
- Advanced Micro Devices, Inc.
- Kevin M. Brandl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DISTRIBUTED MULTI-CORE MEMORY INITIALIZATION
- Publication number 20130042096
- Publication date Feb 14, 2013
- Advanced Micro Devices, Inc.
- Oswin E. Housty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE STIMULUS ENGINE FOR MEMORY RECEIVE AND TRANSMIT SIGNALS
- Publication number 20120284576
- Publication date Nov 8, 2012
- Oswin E. Housty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PRE-MEMORY RESOURCE CONTENTION RESOLUTION
- Publication number 20110138091
- Publication date Jun 9, 2011
- Oswin E. Housty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Distributed Multi-Core Memory Initialization
- Publication number 20110126209
- Publication date May 26, 2011
- Oswin E. Housty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPENSATION ENGINE FOR TRAINING DOUBLE DATA RATE DELAYS
- Publication number 20110040902
- Publication date Feb 17, 2011
- Oswin E. Housty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARALLEL TRAINING OF DYNAMIC RANDOM ACCESS MEMORY CHANNEL CONTROLLERS
- Publication number 20100325372
- Publication date Dec 23, 2010
- Oswin E. Housty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY CONTROL DEVICE AND METHODS THEREOF
- Publication number 20100077253
- Publication date Mar 25, 2010
- Advanced Micro Devices, Inc.
- David M. Lynch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPROCESSOR COMMUNICATION DEVICE AND METHODS THEREOF
- Publication number 20100058044
- Publication date Mar 4, 2010
- Advanced Micro Devices, Inc.
- Oswin E. Housty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for Training Dynamic Random Access Memory (DRAM) Controller...
- Publication number 20090244997
- Publication date Oct 1, 2009
- Advanced Micro Devices, Inc.
- Shawn Searles
- G11 - INFORMATION STORAGE
Information Patent Application
BOOTSTRAP DEVICE AND METHODS THEREOF
- Publication number 20090240981
- Publication date Sep 24, 2009
- Advanced Micro Devices, Inc.
- Andelon X. Tra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IDENTIFICATION OF AN ONBOARD MEMORY BUFFER DEVICE FROM A SYSTEM ADD...
- Publication number 20090193175
- Publication date Jul 30, 2009
- Advanced Micro Devices, Inc.
- Oswin HOUSTY
- G06 - COMPUTING CALCULATING COUNTING

Oswin E. Housty

Person

Patents Grantslast 30 patents

Memory context restore, reduction of boot time of a system on a chi...

Memory context restore, reduction of boot time of a system on a chi...

Secure system memory training

DDR 2D Vref training

DDR receiver enable cycle training

DDR 2D Vref training

Distributed multi-core memory initialization

Pre-memory resource contention resolution

Distributed multi-core memory initialization

Multiprocessor communication device and methods thereof

Memory control device and methods thereof

Bootstrap device and methods thereof

Method for training dynamic random access memory (DRAM) controller...

Memory check architecture and method for a multiprocessor computer...

Patents Applicationslast 30 patents

PARALLELIZED BOOT SEQUENCE

MEMORY CONTEXT RESTORE, REDUCTION OF BOOT TIME OF A SYSTEM ON A CHI...

MEMORY CONTEXT RESTORE, REDUCTION OF BOOT TIME OF A SYSTEM ON A CHI...

SECURE SYSTEM MEMORY TRAINING

DDR 2D VREF TRAINING

ENHANCED SYSTEM MANAGEMENT BUS

DDR RECEIVER ENABLE CYCLE TRAINING

DDR 2D VREF TRAINING

DISTRIBUTED MULTI-CORE MEMORY INITIALIZATION

HARDWARE STIMULUS ENGINE FOR MEMORY RECEIVE AND TRANSMIT SIGNALS

PRE-MEMORY RESOURCE CONTENTION RESOLUTION

Distributed Multi-Core Memory Initialization

COMPENSATION ENGINE FOR TRAINING DOUBLE DATA RATE DELAYS

PARALLEL TRAINING OF DYNAMIC RANDOM ACCESS MEMORY CHANNEL CONTROLLERS

MEMORY CONTROL DEVICE AND METHODS THEREOF

MULTIPROCESSOR COMMUNICATION DEVICE AND METHODS THEREOF

Method for Training Dynamic Random Access Memory (DRAM) Controller...

BOOTSTRAP DEVICE AND METHODS THEREOF

IDENTIFICATION OF AN ONBOARD MEMORY BUFFER DEVICE FROM A SYSTEM ADD...